Page version | Author | Commit Message | Last updated | Format |
---|---|---|---|---|
03c1e9a6 | Grzegorz Daniluk | Moved board specification to a separate sub-page | markdown | |
cea084c3 | Grzegorz Daniluk | Update home | markdown | |
5d0fb87d | Paul PERONNARD | Added heat sink reference | markdown | |
25b3c916 | Grzegorz Daniluk | fix tables (no technical change) | markdown | |
6a896697 | Grzegorz Daniluk | added optional SI549 as WR helper osc | markdown | |
b29156f8 | Grzegorz Daniluk | added cp2108 for USB-UART | markdown | |
3ae096c4 | Grzegorz Daniluk | removed expensive clock crossppoint, specified external PLL for DMTD clock | markdown | |
c74e9161 | Grzegorz Daniluk | Updated clocking scheme after discussions with CT | markdown | |
499bd055 | Grzegorz Daniluk | Added features for Sinara | markdown | |
a966cb2a | Grzegorz Daniluk | Tentatively adding Infineon PMIC for power generation. | markdown | |
0ccc6265 | Grzegorz Daniluk | Little clarification comments | markdown | |
36837cc2 | Grzegorz Daniluk | Early feedback from CT, work in progress | markdown | |
7ce6c303 | Paul PERONNARD | Update home | markdown | |
87c41b7e | Paul PERONNARD | Update home | markdown | |
738dde17 | Grzegorz Daniluk | Update home | markdown | |
806383dc | Grzegorz Daniluk | ESD protection for utility and fan tray I/Os | markdown | |
228ece02 | Grzegorz Daniluk | Update home | markdown | |
5af4f24c | Grzegorz Daniluk | Update home | markdown | |
93361722 | Grzegorz Daniluk | Update home | markdown | |
4664083b | Grzegorz Daniluk | Update home | markdown |