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VME64x core
Commit 6d2b770e authored by Tomasz Wlostowski's avatar Tomasz Wlostowski
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hdl: improved static generation of ADER regsisters (non-64x mode with base address switch)

parent ffa531dc
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Showing with 22 additions and 9 deletions
hdl/rtl/vme_funct_match.vhd
View file @ 6d2b770e
......@@ -34,7 +34,8 @@ use work.vme64x_pkg.all;
entity vme_funct_match is
generic (
g_DECODER : t_vme64x_decoder_arr;
g_DECODE_AM : boolean
g_DECODE_AM : boolean;
g_LAST_ADER : integer
);
port (
clk_i : in std_logic;
......@@ -47,7 +48,7 @@ entity vme_funct_match is
decode_start_i : in std_logic;
am_i : in std_logic_vector( 5 downto 0);
ader_i : in t_ader_array;
ader_i : in t_ader_array(0 to g_LAST_ADER);
-- Set when a function is selected.
decode_sel_o : out std_logic;
......@@ -73,10 +74,7 @@ begin
-- True in case of match
s_function(i) <=
'1' when (((addr_i(t_ADEM_M) and g_DECODER(i).adem(t_ADEM_M))
= ader_i(i)(t_ADEM_M))
and ((am_i = ader_i(i)(t_ADER_AM))
or not g_DECODE_AM))
else '0';
= ader_i(i)(t_ADEM_M))) else '0';
-- True if the AM is enabled by AMCAP
s_ader_am_valid(i) <=
g_DECODER(i).amcap(to_integer(unsigned(am_i)));
......
hdl/rtl/xvme64x_core.vhd
View file @ 6d2b770e
......@@ -109,6 +109,7 @@ entity xvme64x_core is
g_USE_BASE_ADDR_SWITCH : boolean := FALSE;
g_BASE_ADDR_BITS : integer := 6;
g_BASE_ADDR_SHIFT : integer := 16;
-- Function decoder parameters.
g_DECODER : t_vme64x_decoder_arr := c_vme64x_decoders_default);
......@@ -182,6 +183,8 @@ architecture rtl of xvme64x_core is
return i;
end if;
end loop;
return 0;
end least_set_bit;
-- Compute the ADER for each function if CR/CSR is not used. For example:
......@@ -190,11 +193,14 @@ architecture rtl of xvme64x_core is
function compute_static_ader (ga : std_logic_vector) return t_ader_array is
variable a : t_ader_array(0 to c_last_ader) := (others => x"0000_0000");
begin
report "Last ADER: " & integer'image(c_last_ader) severity warning;
for i in a'range loop
if g_DECODER(i).adem /= x"0000_0000" then
a(i) := std_logic_vector(resize(unsigned(ga), 32) sll least_set_bit(g_DECODER(i).adem));
a(i) := std_logic_vector( (resize(unsigned(ga), 32) sll least_set_bit(g_DECODER(i).adem)));
report "ADER: " & integer'image(i) & " : " & integer'image( to_integer(unsigned(a(i)))) severity warning;
end if;
end loop;
return a;
end compute_static_ader;
......@@ -245,7 +251,14 @@ architecture rtl of xvme64x_core is
16#2d# | 16#29# => '1', -- A16
16#08# to 16#0f# => f_to_std_logic(g_VME32), -- A32
others => '0');
signal s_static_ader: std_logic_vector(31 downto 0);
begin
s_static_ader <= std_logic_vector( (resize(unsigned(base_addr_switch_i), 32) sll g_BASE_ADDR_SHIFT));
assert g_CLOCK_PERIOD > 0 report "g_CLOCK_PERIOD generic must be set"
severity failure;
......@@ -397,7 +410,8 @@ begin
inst_vme_funct_match : entity work.vme_funct_match
generic map (
g_DECODER => g_DECODER,
g_DECODE_AM => g_DECODE_AM and g_ENABLE_CR_CSR
g_DECODE_AM => g_DECODE_AM and g_ENABLE_CR_CSR,
g_LAST_ADER => c_last_ader
)
port map (
clk_i => clk_i,
......@@ -513,6 +527,7 @@ begin
s_irq_level <= irq_level_i(2 downto 0);
end generate;
end generate;
gen_disable_cr_csr : if g_ENABLE_CR_CSR = false generate
s_user_csr_data_i <= user_csr_data_i;
s_cr_csr_data_o <= s_user_csr_data_i;
......@@ -528,7 +543,7 @@ begin
s_ader <= compute_static_ader(s_ga) when not g_USE_BASE_ADDR_SWITCH
else compute_static_ader(base_addr_switch_i);
else (others => s_static_ader);
end generate;
user_csr_addr_o <= s_user_csr_addr;
......
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