rtl: support for completely custom user-provided ADER register values

Useful for non-standard VME geographic addressing implementations (example: RF VXS platform).

rtl: support for completely custom user-provided ADER register values
Useful for non-standard VME geographic addressing implementations (example: RF VXS platform).
66974a5a · Tomasz Wlostowski · c9f3b568 · 66974a5a · 66974a5a
Commit 66974a5a authored Jul 20, 2022 by Tomasz Wlostowski
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Showing with 12 additions and 2 deletions

vme64x_core.vhd hdl/rtl/vme64x_core.vhd +6 -1

xvme64x_core.vhd hdl/rtl/xvme64x_core.vhd +6 -1

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--- a/hdl/rtl/vme64x_core.vhd
+++ b/hdl/rtl/vme64x_core.vhd
@@ -15,10 +15,12 @@ entity vme64x_core is
    g_DECODE_AM       : boolean := true;
    g_ENABLE_CR_CSR   : boolean := true;
    g_USER_CSR_EXT    : boolean := false;
+    g_USE_CUSTOM_ADER : boolean := false;
    g_VME32           : boolean := true;
    g_VME_2e          : boolean := False;
    g_ASYNC_DTACK     : boolean := False;
    g_WB_GRANULARITY  : t_wishbone_address_granularity;
+    g_WB_MODE         : t_wishbone_interface_mode;
    g_MANUFACTURER_ID : std_logic_vector(23 downto 0);
    g_BOARD_ID        : std_logic_vector(31 downto 0);
    g_REVISION_ID     : std_logic_vector(31 downto 0);
@@ -96,6 +98,7 @@ entity vme64x_core is
    wb_sel_o        : out t_wishbone_byte_select;
    wb_we_o         : out std_logic;
    wb_dat_o        : out t_wishbone_data;
+    ader_i          : in t_ader_array(0 to 7) := (others => (others => '0'));
    int_i           : std_logic := '0';
    irq_ack_o       : out std_logic;
    irq_level_i     : std_logic_vector(2 downto 0) := (others => '0');
@@ -116,9 +119,10 @@ begin
      g_DECODE_AM        => g_DECODE_AM,
      g_ENABLE_CR_CSR    => g_ENABLE_CR_CSR,
      g_USER_CSR_EXT     => g_USER_CSR_EXT,
+      g_USE_CUSTOM_ADER  => g_USE_CUSTOM_ADER,
      g_VME32            => g_VME32,
      g_WB_GRANULARITY   => g_WB_GRANULARITY,
-      g_WB_MODE          => CLASSIC,
+      g_WB_MODE          => g_WB_MODE,
      g_VME_2e           => g_VME_2e,
      g_ASYNC_DTACK      => g_ASYNC_DTACK,
      g_MANUFACTURER_ID  => g_MANUFACTURER_ID,
@@ -182,6 +186,7 @@ begin
      wb_o.sel        => wb_sel_o,
      wb_o.we         => wb_we_o,
      wb_o.dat        => wb_dat_o,
+      ader_i          => ader_i,
      int_i           => int_i,
      irq_ack_o       => irq_ack_o,
      irq_level_i     => irq_level_i,

--- a/hdl/rtl/xvme64x_core.vhd
+++ b/hdl/rtl/xvme64x_core.vhd
@@ -119,6 +119,8 @@ entity xvme64x_core is
    g_BEG_SN          : std_logic_vector(23 downto 0)  := x"000000";
    g_END_SN          : std_logic_vector(23 downto 0)  := x"000000";

+    g_USE_CUSTOM_ADER : Boolean := false;
+    
    -- Function decoder parameters.
    g_DECODER         : t_vme64x_decoder_arr := c_vme64x_decoders_default);
  port (
@@ -146,6 +148,9 @@ entity xvme64x_core is
    -- pulse to the IRQ Generator.
    irq_ack_o       : out std_logic;

+    ader_i          : in t_ader_array(0 to 7);
+    
+    
    -- User CSR
    -- The following signals are used when g_USER_CSR_EXT = true
    -- otherwise they are connected to the internal user CSR.
@@ -536,7 +541,7 @@ begin
    s_module_enable   <= '1';
    s_module_reset    <= '0';
    s_bar             <= s_ga;
-    s_ader            <= compute_static_ader(s_ga);
+    s_ader            <= compute_static_ader(s_ga) when not g_USE_CUSTOM_ADER else ader_i;
  end generate;

  user_csr_addr_o <= s_user_csr_addr;