lm32: add missing wires to silence warnings

In Verilog, an "assign x = y;" will cause a warning in Quartus if x was not defined.
For example,
  Warning (10236): Verilog HDL Implicit Net warning at lm32_allprofiles.v(45398): created implicit net for "multiply"
This patch defines all such nets.

Also, the CSR width is too narrow by default (CFG2 must fit).