Trace length matching
All clock traces from clock buffer ADCLK944 to NB4L52 (nets CLK___P/N) have to be matched.
All input set/reset traces from FMC connector to NB4L52 (nets IN_SET/RES_*_P/N) have to be matched.
All set/reset pulse traces from NB4L52 to MC100EP140 (via MC100EP195, nets SET/RST_P/N and SET/RST_DELAY_P/N) have to be matched.
Both pulse outputs from MC100EP140 to the front panel connector have to be matched.