added AD9512 synchronization pulse to the simulation

1ca03bbf · Jan Pospisil · 28f3b2fe · 1ca03bbf
Commit 1ca03bbf authored Apr 10, 2017 by Jan Pospisil
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TestbenchPackage.sv hdl/ffpg/sim/testbench/TestbenchPackage.sv +11 -1

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--- a/hdl/ffpg/sim/testbench/TestbenchPackage.sv
+++ b/hdl/ffpg/sim/testbench/TestbenchPackage.sv
@@ -552,7 +552,17 @@ package TestbenchPackage;
            int SetMemBaseAddress = (Channel == 1) ? `GET_WB_FFPG_ADDR(`BASE_FFPG_CH1_SET_MEM) : `GET_WB_FFPG_ADDR(`BASE_FFPG_CH2_SET_MEM);
            int ResMemBaseAddress = (Channel == 1) ? `GET_WB_FFPG_ADDR(`BASE_FFPG_CH1_RES_MEM) : `GET_WB_FFPG_ADDR(`BASE_FFPG_CH2_RES_MEM);
            int OverflowInWords = getOverflowInWords();
-            
+
+            // sync AD9512
+            tx = td_wb_tx::type_id::create("tx");
+            start_item(tx);
+            assert(tx.randomize());
+            tx.direction_e = WB_B3_DIR_WRITE;
+            tx.address = `GET_WB_FFPG_ADDR(`ADDR_FFPG_CONTROL);
+            tx.data = 1 << `FFPG_CONTROL_AD9512_SYNC_OFFSET;
+            finish_item(tx);
+            assert(tx.response_e == WB_B3_RESPONSE_ACK_OK);
+
            // configure overflow
            tx = td_wb_tx::type_id::create("tx");
            start_item(tx);