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FMC ADC 100M 14b 4cha
Commit 7e594263 authored by Tristan Gingold's avatar Tristan Gingold Committed by Federico Vaga
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doc: use cheby files from hdl/ for the register map

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doc/gateware/regs/Makefile
View file @ 7e594263
......@@ -2,16 +2,23 @@
#
# SPDX-License-Identifier: CC0-1.0
SOURCES = $(wildcard *.cheby) ../../../hdl/cheby/fmc_adc_mezzanine_mmap.cheby
TARGETS = $(SOURCES:.cheby=.htm)
all: spec_base_regs.htm svec_base_regs.htm svec_ref_fmc_adc_100Ms_mmap.htm spec_ref_fmc_adc_100Ms_mmap.htm
all: $(TARGETS)
.PHONY: clean
.PHONY: $(TARGETS) clean
CHEBY_BUILD=(cd $(dir $<); cheby -i $(notdir $<) --gen-doc --doc html) > $@
$(TARGETS): %.htm : %.cheby
@echo -e "\n\033[34m\033[1m-> Processing file $<\033[0m"
@cheby -i $< --gen-doc=$(shell basename $@) --doc html
spec_ref_fmc_adc_100Ms_mmap.htm: ../../../hdl/cheby/spec_ref_fmc_adc_100Ms_mmap.cheby
$(CHEBY_BUILD)
svec_ref_fmc_adc_100Ms_mmap.htm: ../../../hdl/cheby/svec_ref_fmc_adc_100Ms_mmap.cheby
$(CHEBY_BUILD)
svec_base_regs.htm: ../../../hdl/ip_cores/svec/hdl/rtl/svec_base_regs.cheby
$(CHEBY_BUILD)
spec_base_regs.htm: ../../../hdl/ip_cores/spec/hdl/rtl/spec_base_regs.cheby
$(CHEBY_BUILD)
clean:
@rm -f *.md *.rst *.htm
doc/gateware/regs/spec_ref_fmc_adc_100Ms_doc.cheby deleted 100644 → 0
View file @ a7d5a59f
# SPDX-FileCopyrightText: 2020 CERN (home.cern)
#
# SPDX-License-Identifier: CC-BY-SA-4.0
memory-map:
name: spec_ref_fmc_adc_100m_doc
bus: wb-32-be
description: SPEC FMC-ADC-100M full memory map
children:
- submap:
name: spec_base_mmap
address: 0x0000
description: SPEC base memory map
filename: ../../../hdl/ip_cores/spec/hdl/rtl/spec_base_regs.cheby
- submap:
name: metadata
address: 0x2000
size: 0x40
interface: wb-32-be
x-hdl:
busgroup: True
description: a ROM containing the application metadata
- submap:
name: fmc_adc_mezzanine
address: 0x4000
description: FMC ADC Mezzanine
filename: ../../../hdl/cheby/fmc_adc_mezzanine_mmap.cheby
doc/gateware/regs/svec_ref_fmc_adc_100Ms_doc.cheby deleted 100644 → 0
View file @ a7d5a59f
# SPDX-FileCopyrightText: 2020 CERN (home.cern)
#
# SPDX-License-Identifier: CC-BY-SA-4.0
memory-map:
name: svec_ref_fmc_adc_100m_doc
bus: wb-32-be
description: SVEC FMC-ADC-100M full memory map
children:
- submap:
name: svec_base_mmap
address: 0x0000
description: SVEC base memory map
filename: ../../../hdl/ip_cores/svec/hdl/rtl/svec_base_regs.cheby
- submap:
name: metadata
address: 0x2000
size: 0x40
interface: wb-32-be
x-hdl:
busgroup: True
description: a ROM containing the application metadata
- submap:
name: fmc1_adc_mezzanine
address: 0x4000
description: FMC ADC Mezzanine slot 1
filename: ../../../hdl/cheby/fmc_adc_mezzanine_mmap.cheby
- submap:
name: fmc2_adc_mezzanine
address: 0x6000
description: FMC ADC Mezzanine slot 2
filename: ../../../hdl/cheby/fmc_adc_mezzanine_mmap.cheby
doc/gateware/spec_ref_fmc_adc_100M.rst
View file @ 7e594263
......@@ -6,5 +6,18 @@
SPEC FMC ADC 100M
=================
The memory map is divided in two parts: a common part defined by the
carrier and shared with other designs, and a second part specific to
the mezzanine.
Common part
***********
.. raw:: html
:file: regs/spec_base_regs.htm
Specific part
*************
.. raw:: html
:file: regs/spec_ref_fmc_adc_100Ms_doc.htm
:file: regs/spec_ref_fmc_adc_100Ms_mmap.htm
doc/gateware/svec_ref_fmc_adc_100M.rst
View file @ 7e594263
......@@ -6,5 +6,18 @@
SVEC FMC ADC 100M
=================
The memory map is divided in two parts: a common part defined by the
carrier and shared with other designs, and a second part specific to
the mezzanine.
Common part
***********
.. raw:: html
:file: regs/svec_base_regs.htm
Specific part
*************
.. raw:: html
:file: regs/svec_ref_fmc_adc_100Ms_doc.htm
:file: regs/svec_ref_fmc_adc_100Ms_mmap.htm
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