Define basic assembly variants

It may be beneficial to add some assembly variants to the project. It will also make us sure that the variants we need are feasible.

Please describe desired assembly variants in the comments.

mentioned in issue #43 (closed)

First, I suggest we try to define a part number, something like: AFC4-XXXXXXX

I have a few suggestion for 9 of these letters:

MGTs

MGTs selection, GTPs 113, 116 and 213 and their respective ref. clocks (note GTP 216 has fixed configuration).

Generic I/O pin assignment

• Option A) 2 slots FMC HPC + no RTM

• Option B) 1 slot FMC HPC (FMC1) + 1 slot FMC LPC (FMC2) + fully populated RTM D1.3

Clock selection

added schematics label

We had internal discussions about MGTs and variants at LNLS today and we have a slight conceptual modification to propose for GTPs 116 and 213: swap the "D" option (AMC P2P ports 12-15), that is, move it from GTP 213 to GTP 116.

We think the board will be more versatile this way, since users wanting to use FMC HPC + RTM + P2P will have RTM GTP0-3 available instead of GTP4-7. RTM modules will start populating GTPs from the lower indexes, so it is more important to make GTP0-3 available than GTP4-7.

We understand this may require substantial re-layout of 4 MGT pairs, on the other hand there will be 2 additional layers for RTM signal routing.

This is just a suggestion to improve the versatility of the board.

I updated the proposed variants on the table above. I kept the old proposal with "strikethough" font formatting.

Unfortunately, there won't be 2 additional layers. AFCZ has 18 layers only because all differential signals are kept on 4 layers (including 2 external). To be more specific: AFCZ uses 0.06 mm dielectric between most layers. With that configuration, we can route traces with impedance about 30-40 Ohm (no problem in AFCZ for DDR lines) but it's impossible to route differential with 100 Ohm impedance on internal layers.

We have double FMC HPC + full RTM connection which means we have differential lines on all our layers. I changed dielectric to 0.06 mm only for TOP and BTM (now PCB thickness is 1,612mm).

My suggestion is to swap GTP0-3 and GTP4-7 connection to FPGA.

Nice.

So, the idea is to connect RTM GTP0-3 to transceiver 116 and GTP4-7 to 213, while keeping AMC P2P on 213?

That would be also great.

So, the idea is to connect RTM GTP0-3 to transceiver 116 and GTP4-7 to 213, while keeping AMC P2P on 213?

Yes

Implemented changes:

1. swapped GTP0-3 GTP4-7

2. Swapped clocks RTM_GTP03 and RTM_GTP47 (at fanouts outputs)

3. Swapped clock RTM_FPGA_CLK 1 and 2

Great, I've updated the table of this issue (above) where we show the proposed options for each MGT, just to keep it synced.

The only drawback I see by making this way is that users won't be able to have HA and HB FMC banks plus 4 MGTs on FMC slot when RTM with MGT is in use. They will have to choose among FMC1 with HPC and no MGT or FMC2 LPC + 4 MGTs.

This should be no big issue, however, since many FMCs requiring MGTs do not make use of many I/O pins. It's a good trade-off then.

Since this issue has been used to group all variants as a part number, it seems we still have to reserve 2 more letters:

Primary programmable oscillator (10-280 MHz / LVDS) configuration:

• Option A) Si571 + DAC circuitry
• Option B) Si570 (without DAC)

Secondary programmable oscillator (10-160 MHz / CMOS) configuration:

• Option A) Si571 + DAC circuitry
• Option B) Si570 (without DAC)

Does everybody agree the 1-bit DAC configuration for Si571 does not need to be among the main assembly options, thus left undocumented?

This discussion is related with #113 (closed).

mentioned in commit 9098d25e

mentioned in issue #113 (closed)

mentioned in issue #44 (closed)

I suggest leaving definition of basic assembly variants in favour of generating customer-dedicated assembly variants with proper documentation.

TS configuration tool for variant definition can be found here: https://technosystem.pl/afc-configurator/

closed

mentioned in issue #183