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  • Projects / ARMadillo

    A multi-purpose ARM-based small piggy-back PCB with Linux support, Ethernet, USB, sound, graphic LCD and lots of I/O pins.

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  • Projects / FIP Converter

    A converter between USB/Ethernet and WorldFIP, allowing the bus arbitration and control of a WorldFIP fieldbus segment from a USB or Ethernet-equipped computer.

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  • Projects / Miscellaneous Projects - non-HW

    Projects not directly identifiable with PCB or HDL core developments.

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  • Projects / FMC PCIe Carrier PFC - Software

    Linux device driver and associated utilities for PCIe FMC carriers. Aka GnuRabbit.

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  • Projects / OpenPicus

    OpenPicus is an Italian project made to fill the gap between Embedded Low Cost and Wireless. Picus modules are based on the well known Microchip PIC 24F 16bit processor connected to a Wireless Transceiver (WI-FI or BLUETOOTH). The OpenPicus Framework let you develop your Apps in easy way even without specific experience with Communication protocols. The IDE is also FREE and you can create, compile and download to the modules yoru Apps, no programming tools are needed.

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  • Projects / SPI Boards Package

    SPI Boards Package is a set of electronic boards developed at Soleil Synchrotron (France). These boards can be connected together in a daisy chain and they communicate with an embedded controller via an SPI Bus. They provide the following features:

    - Platform allowing us to build specific solutions with simple and open tools.

    - Modular architecture.

    - Provide solutions for applications which require synchronization.

    - Low level process implementation to achieve better performance. - Easy Control network connection

    The main CPU board contains a microprocessor. It manages a task for communication with the supervision, an embedded process and SPI communication with the peripheral boards. We have a modular approach that means we can make various Peripheral board combinations between 16-bit DAC, 16-bit ADC, and a calculator board for motor encoder.

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  • Projects / PHASE

    PHASE (Portable Hardware Analyzer with Sharing Explorer) aims at unifying hardware debugging in a single tool. From the host machine, a user may graphically interconnect components to describe the connection between his computer and the target device to debug. For example, a USB JTAG cable might be the root node, connected to an Arria2 development board with a CPLD and an FPGA, containing a LM32 processor.

    Wherever possible, PHASE fetches design descriptions from the internet based on the detected JTAG IDCODEs, USB vendor IDs, or PnP BUS information. In the preceding example, each step of the chain would be automatically detected. The USB cable from the vendor+product codes, the FPGA from the JTAG IDCODE and the LM32 from the Arria2's sld hub. The user would now be presented with read/write access to the data and instruction buses for visual inspection or firmware loading. Furthermore, the user could launch gdb to halt and single-step the embedded LM32 CPU.

    If a device is not yet described, the user may assemble a driver out of the reusable software components. For example, an Altera USB-Blaster driver is just a FTDI device chained with a byte packeter and a JTAG bit banger. Once the design has been graphically assembled, it is automatically scanned for attached JTAG devices and the USB cable design is shared online with any future users of the same cable.

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  • Projects / IPBus

    IPBus is a FPGA Core that controls a Wishbone bus via Ethernet. Currently the transport protocol is UDP/IP, although there are plans for an ATA over Ethernet (AoE) implementation. There are reference designs for the SP601 and SP605 Xilinx FPGA boards.

    Details at http://ipbus.web.cern.ch/ipbus/

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  • Projects / GTS Guesses Timing Somehow

    GTS is a tool which takes a binary for a given microprocessor (initially an LM32) and gives information about worst-case execution time.

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  • Projects / CERN LNGS Time Transfer

    A project to describe techniques and gather results of the time transfer between CERN and LNGS for the neutrino Time Of Flight experiment.

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  • Projects / FMC LPC 100 Mil 12 Pin Digital IO Expansion Board

    An LPC FMC board which seeks to distribute digital I/O. It is designed to operate at least at 10 MHz, however a better design could allow this board to operate at much higher frequencies. This board is compatible with "PMOD" Connectors.

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  • Projects / ROBIN-NP - Hardware

    Hardware designs for ROBIN-NP project.

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  • Projects / ROBIN-NP - Gateware

    Firmware for ROBIN-NP project.

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  • Projects / ROBIN-NP - Software

    Software for ROBIN-NP project.

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  • Projects / White Rabbit Network Robustness

    The robustness of a White Rabbit Network (WRN) is a broad subject covering methods (HW & SW) which enable to increase overall reliability of a WR-based system. This includes Forward Error Correction (FEC), Quality of Service (QoS) assurance, support of network redundancy, proper network design, thorough diagnostics, and increasing the reliability of network components (i.e. switches, nodes). Here, these methods are described and their implementation sources gathered.

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  • Projects / Neo51

    Neo51 is an open source hardware based on 89V51 microcontroller. It has a dual mode feature selectable via DIP switch supporting arduino hardware compatible ports and the legacy 8051 ports.

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  • Projects / GSI Timing Starter Kit

    The GSI Timing Starter Kit is a functional snapshot of the eventual FAIR timing system, which is under active development. It demonstrates real-time coordination of two front-end equipment controllers. The product consists of a data master (Linux PC) which coordinates events, a timing master which synchronizes clocks (White Rabbit switch), and two front-end equipment controllers (either SPECv4 or SCUv2).

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  • Projects / SPICONTROLLER

    SPICONTROLLER is the controller board for the SPI Boards Package. It manage communication task with control system via Ethernet and with modular boards via SPI interface. Moreover, specific process can be embedded into the controller.

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  • Projects / SPIETBOX

    SPIETBOX is a board developed around a SPARTAN-3 FPGA in order to process TTL and SSI encoders. The board is design to work in stand alone or connected to a SPICONTROLLER via the SPI interface.

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  • Projects / PMTLib

    The project is a set of Kicad Symbols and Footprints that are used in a collection of smaller Kicad based sub projects. Each sub project will use the common library to ease and standardise design but will be a related implementation or documentation of a design. The topic for the Library and designs are Photo Multiplier Tube (PMT) based particle and optical detectors.

    Whilst it is envisaged that each project will feature a PMT in some way. Some designs may not, but will be tangibly related in some useful way to particle detection and PMT's. For example a Divide by 10 HV PSU tester has no PMT but is used when working with the HV supply’s for PMT's. A High Voltage supply similarly has no PMT but is used with. A Geiger Muller Tube based detector may be used as a trigger source for PMT based particle detectors.

    Each sub project is expected to be fully self contained (In it's own subdirectory within the same repository as PMTLib) with the exception of common Kicad Libraries and the inclusion of the PMTLib libraries and foot prints. A sub project may include a simulation of the design. Such simulations will be constructed using Open source Tools (ie QUCS or similar). PCB Layouts, Datasheets, PDF's and Photographs of finished designs may also be included. A sub project will contain at a minimum a Schematic and a README doc detailing attribution,licensing and any additional notes the designer wants to add.

    Having mentioned the README doc the principle place for design related notes is on the Schematic that defines the sub-project.

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