IPBus is a FPGA Core that controls a Wishbone bus via Ethernet. Currently the transport protocol is UDP/IP, although there are plans for an ATA over Ethernet (AoE) implementation. There are reference designs for the SP601 and SP605 Xilinx FPGA boards.

Details at http://ipbus.web.cern.ch/ipbus/

Project ID: 10726

The repository for this project is empty