Explore projects

The differential to single ended cable driver is an active electronics circuit that implements a high-current differential receiver, with optional attenuation (0dB, 6dB, 10dB and 12dB available), polarity inversion and ground lifting on input and output. More info at the Wiki page

Common gateware for the different level conversion circuits.

Companies using the Open Hardware Repository

A project to describe techniques and gather results of the time transfer between CERN and LNGS for the neutrino Time Of Flight experiment.

A project devoted to developing and discussing the CERN Open Hardware Licence. More info at the Wiki page

This project hosts documentation and code to be contributed by CERN's BE-CO-HT section to the KiCad PCB design tool. More info at the Wiki page

WorldFIP is a deterministic rad-tol fieldbus used at CERN's LHC for a variety of control systems. Cryogenics, Power Converters, Beam Instrumentation and other critical systems are using WorldFIP for the exchange of data between their sensors and actuators and the control and supervision level. With Alstom phasing out WorldFIP support in 2009, it was decided to insource this technology at CERN.

ELMB is an analog/digital input/output module with CANbus interface. About 10000 of ELMBs are used in various CERN installations of experiments running on LHC. They are used in control and monitoring of equipment. The ELMB is radiation qualified for an order of around 35 Gy of total intercepted dose.

ELMB2 is an analog/digital I/O module with CANbus interface. They are used in various CERN installations in control and monitoring of equipment. The ELMB2 is radiation qualified. More info at the Wiki page

Sub-micrometer resolution beam position monitoring system (BPM) for accelerators. It provides real-time orbit monitoring, buffered data readouts, fast orbit feedback capabilities and advanced beam diagnostics tools.

Signal conditioning electronics for BPM pick-ups providing 4-channel RF signal analog filtering, amplification, digitally controlled attenuation and several calibration schemes.

Gateware for Beam Position Monitor, including digital signal processing chains, data acquisition engines, ADC and analog front-end peripherals control/monitoring, timing and control system interface.

This project presents an FPGA architecture for the computation of visual attention based on the combination of a bottom-up saliency and a top-down task-dependent modulation streams. The bottom-up stream is deployed including optical flow, local energy, red-green and blue-yellow color opponencies, and different local orientation maps. The final saliency is modulated by two highlevel features: optical flow and disparity. The architecture include some feedback masks to adapt the weights of the features that are part of the bottom-up stream, depending on the specific target application. The target applications are ADAS (Advanced Driving Assistance Systems), video surveillance, robotics, etc...

A low cost, low complexity FMC carrier based on Xilinx Artix-7

The AsyncArt Project is comprised by a set of Open-Source HDL libraries and examples targeted to the efficient implementation of Globally Asynchronous, Locally Synchronous (GALS) design architectures over Commercial-Off-The-Shelf FPGA devices.

A system to characterise large area silicon pad sensors with several hundred channels. It consists of two PCBs. One is an active switching 512-to-1 matrix. The second one is a passive probe card to contact the sensor. Testing.

A system to characterise large area silicon pad sensors with several hundred channels. It consists of two PCBs. One is an active switching 512-to-1 matrix. The second one is a passive probe card to contact the sensor. Hardware.

A system to characterize large area silicon pad sensors with several hundred channels. This repository contains the microcontroller firmware.

A multi-purpose ARM-based small piggy-back PCB with Linux support, Ethernet, USB, sound, graphic LCD and lots of I/O pins.

The AMC micro backplane enables stand-alone operation of an AMC FMC carrier or any other AMC board. It has 4 SFP connectors, 2 QSFP cages, 8 trigger I/O routed to the MLVDS ports and power entry. *Superseded by the project amc-carrier-2-sl*