VME FMC+ Carrier (VFC-HS)

Project description

The VFC-HS is an Intel Arria V based VME64x carrier for one FMC+ Mezzanine Card (VITA 57.4). It is has six SFP+ transceivers compatible with support for rad-hard GBT links, CERN Beam Synchronous Timing (BST), White Rabbit and Ethernet.

This card is an upgrade of the VFC-HD for fast sampling applications. It has been developed by the Beam Instrumentation (BI) group at CERN.

Main features

• Intel Arria V GT FPGA (5AGTFD7K3F40I3N)
• FMC+ slot
  • Fully populated LA, HA & HB banks
  • 16 gigabit lanes connected to FPGA transceivers
  • Programmable Vadj
• 6 SFP+ running up to 10Gbps
  • 4 "application" SFPs for GBT connections
  • 2 "system" SFPs for BST/White Rabbit & Ethernet
• 40 single ended (or 20 LVDS) connections to VME P2 available for rear transition modules
• 30 single ended connections to VME64x P0 to support clock & trigger distribution in (custom) BI LHC VME crates
• Flexible clocking resources
  • Si570 10-280MHz programmable oscillator
  • ADN2814 CDR for BST reception
  • 125MHz & 20MHz VCXOs for White Rabbit support
  • Si5338 clock synthesizer
• DDR3 memory on board
• Front panel connectivity:
  • 6 SFP+ cages
  • 4 LEMO-00 general purpose I/O
  • 8 user LEDs
• 12 layer PCB

Project information

• Official design data EDMS EDA-03836
• LHC equipment name: HC-BOEVB
• Schematic diagram: EDA-03836-V1-0_sch.pdf
• Bill of material: EEDA-03836-V1-0_pcb-mat.pdf

Users

• CERN Beam Instrumentation Group

Contact

• Andrea Boccardi - CERN

Status