Tool for generating multi-purpose makefiles for FPGA projects.

Main features:

makefile generation for: fetching modules from repositories simulating HDL projects synthesizing HDL projects synthesizing projects remotely (keeping your local resources free) generating multi-vendor project files (no clicking in the IDE!) many other things without involving make and makefiles

Hdlmake supports modularity, scalability, revision control systems. Hdlmake can be run on any Linux or Windows machine with any HDL More info at the Wiki page

A collection of platform-independent cores such as memories, synchronizer circuits and Wishbone cores.

More info at the Wiki page

AMC FMC Carrier is designed to support FMC boards. Equipped with Xilinx Artix-7 FPGA. It allows to connect clock source to any clock input. More info at the Wiki page

The open-source HEV ventilator implements the modes PC-A/C, PC-A/C-PRVC, PC-PSV and CPAP More info at the Wiki page

The High Performance WR Receiver module is an MTCA eRTM (slots 14-15) WR receiver with redundant uplinks, providing a variety of ultra-low jitter clock signals.

More info at the Wiki page

A project devoted to developing and discussing the CERN Open Hardware Licence. More info at the Wiki page

White Rabbit PTP Core software for LatticeMico32. It consists of a software wrapper for running a PTP daemon without an operating system and device drivers for WRPC HDL internals.

A VHDL core for a VME64x slave. The other side behaves like a Wishbone master.

More info at the Wiki page

A fine delay generator in FMC format with 1 input and 4 outputs. The resolution is 1 ns. Commercially available. More info at the Wiki page

A simple 4-lane PCIe carrier for a low pin count FPGA Mezzanine Card (VITA 57). It supports the White Rabbit timing and control network. Commercially available. Linux and Labview drivers available for some mezzanine cards. More info at the Wiki page

A simple VME64x carrier for two low pin count FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network. Commercially available. More info at the Wiki page

Intel Arria V based VME64x carrier for one high pin count FMC with six SFP connectors, DDR3 memory and clocking resources to support White Rabbit. For more details please refer to the wiki pages.

A fine delay generator in FMC LPC format with 1 input and 2 outputs. The resolution is 1 ns. Optimized for high frequency pulse repetition rates synchronized to an external clock. More info at the Wiki page

The Electronics Design project gives helpful entry points for electronics engineers. VHDL coding, design reviews, components, production, assembly and testing are some subjects. More info at the Wiki page

Intel Arria V based VME64x carrier for one FMC+ mezzanine with six SFP connectors, DDR3 memory and clocking resources to support White Rabbit. For more details please refer to the wiki pages.

Distributed I/O Tier - these are electronics modules installed close to a particle accelerator in radiation-exposed or radiation-free areas controlled by the master in the Front-end tier over the fieldbus. These are usually FPGA-based boards sampling digital and analog inputs, driving outputs and performing various safety critical operations. More info at the Wiki page

A VME card that is used to recover RF, bunch and revolution clocks over a white rabbit network.

More info at the Wiki page

DI/OT Igloo2-based System Board for radiation-exposed DI/OT applications. More info at the Wiki page

White Rabbit Trigger Distribution project. More info at the Wiki page

A collection of cores needed in the White Rabbit node and switch. Includes White Rabbit PTP Core (WRPC).