VME FMC Carrier (VFC-HD)

Project description

The VFC-HD is an Intel Arria V based VME64x carrier for one High Pin Count (HPC) FPGA Mezzanine Card (FMC, VITA 57). It is has six SFP+ transceivers compatible with support for rad-hard GBT links, CERN Beam Synchronous Timing (BST), White Rabbit and Ethernet.

The card has been developed by the Beam Instrumentation (BI) group at CERN as a general purpose digital acquisition card. It replaces the VFC, which is no longer under development by BI.

The VFC-HS is an upgraded version to support a FMC+ mezzanine with 10Gbps lanes.

Main features

• Intel Arria V GX FPGA (5AGXMB1G4F40C4N)
• HPC FMC slot
  • Fully populated LA, HA & HB banks
  • 10 gigabit lanes connected to FPGA transceivers
  • Programmable Vadj
• 6 SFP+ running up to 6.5Gbps
  • 4 "application" SFPs for GBT connections
  • 2 "system" SFPs for BST/White Rabbit & Ethernet
• 40 single ended (or 20 LVDS) connections to VME P2 available for rear transition modules
• 30 single ended connections to VME64x P0 to support clock & trigger distribution in (custom) BI LHC VME crates
• Flexible clocking resources
  • Si570 10-280MHz programmable oscillator
  • ADN2814 CDR for BST reception
  • 125MHz & 20MHz VCXOs for White Rabbit support
  • Si5338 clock synthesizer
• 2 GB DDR3 memory on board (2x MT41K512M16HA-125)
• Front panel connectivity:
  • 6 SFP+ cages
  • 4 LEMO-00 general purpose I/O
  • 8 user LEDs
• 12 layer PCB

Project information

• Official design data EDMS EDA-03133
• LHC equipment name: HC-BOEVA
• Schematic diagram: EDA-03133-V3-1_sch.pdf
• Bill of material: EDA-03133-V3-1_pcb-mat.pdf
• Manufacturing test suite
• White Rabbit support

Users

• CERN Beam Instrumentation Group
  Used as a general purpose digital board for beam instrumentation (~1200 boards installed).

Contact

• Andrea Boccardi - CERN

Status