This page is a life document to decide on the features of the new WR switch. It is based on the following previous inputs:
- Discussion in wr-dev mailing list (~2017, not available online any more)
- Discussion during WR Workshop at CERN (2018, available here )
- Summary of the two above available here
- Feedback from CERN IT here
Enclosure Size
- Front/back panel must be 1U (the same as in current switch)
- Depth - depends on the design requirements (might be more than currently switch)
Front Panel
Feature | Proposal | To be discussed (TB-D) / investigated (TB-I) or Comment |
---|---|---|
Data ports | Number: 18 Speed: 1 and/or 10 Gbps |
|
Mgmt ports | 2 Ethernet (SFP cage + RJ45) USB Mini-B |
TB-I: standard/common management interfaces on Ethernet switches (USB Mini-B, RS232, others) Add serial over RJ45, if space allows. |
Other ports | USB | To allow firmware update (upgrade of repair) and maybe configuration update |
CLK IOs | SMA connectors: IN_1: 10 MHz IN_2: 1 PPS IN_3: AUX OUT_1: 10 MHz OUT_2: 1 PPS OUT_3: 62.5 MHz OUT_4: AUX (abscal) (all switchable between High-Z and 50 Ohm) |
Check how SMA and AUX IN/OUTSMA can fit IN_3 AUX could be used in the future for internal TIC... TBI: standardization of voltage levels and rise time, possibility to disable inputs to improve noise |
Port Status | LEDs 1: Link / WR mode / Calib 2: Synced / Activity / Speed |
|
General status | Small/standard OLED dispay | OLED replaces status LEDs TBI: what displays are used in Ethernet switches (LEDs, screens) |
Button | Reset Flash (from USB) |
The type of buttons that can be pressed only with a pen/needle, see TBI: what is the common practice in Ethernet switches |
NOTE: There is no support for port speeds higher than 10 Gbps (coherent, 25Gbps and 100Gbps) - there is no real requirements for such feature and it would result in substantial cost.
NOTE: The chosen FPGA allows for 20 ports, yet we consider 18 sufficient, usually people ask for less.
Back panel
Feature | Proposal | To be discussed (TBD) or Comment |
---|---|---|
Power | Power switch Power plug |
It is easier and more practical from design view-point, as well as saver to have it in the back |
Debugging | USB Mini-B FPGA USB Mini-B CPU |
NOTE: There is no RS232 port in the back (as compared to the previous version of the WR Switch) - it was not really used
Power Supply
- To be investigated:
-
Initial idea: the basic version of the switch should have single power supply (not redundant, not swappable) and be prepared for redundant/swappable supply, two possibilities to explore
- Standard socket for redundant/swappable power supply already in place in the basic switch version (e.g. with Zippy M1U2-5650V4H )
- Standard connector (power/diagnostics) to allows WR switch versions with redundant/swappable power supply and empty space in the WR switch enclosure
- Enough current for DWDM
FANs and airflow
-
To be investigated:
- What is typically used in Ethernet switches (standards and common practices)
- If/what standards for redundant/swappable fans exist for switches/servers/other
-
Initial idea for FANs:
- Make a fan-less switch with FANs, i.e. include means that improved heat dissipation from the Fan-less WR switch while installing FANs
- Provide swappable fans in the basic version of the WR switch (e.g. based on existing solution, custom mechanics using standard fans to minimize costs)
-
Initial idea for airflow:
- Initial idea: by default front-back airflow, allow back-front - further study needed
- FANs should be of good quality with speed measurement supported by HW, Fan control in PCB
- Air holes in the front panel should be added, not to depend on the SFP cages
NOTE1: Fanless version (i.e. no fans) has been discarded, it is not sufficient for DWDM. Yet, ideas from the fanless version might be used.
FPGA
- Zynq Ultrascale+
- Most likely ZU11
- Speed & Temp Grade: -1 (slowest) Extended (0-100 C deg), see
PCB
- 1 PCB for basic functionality - TBI: the current sandwich approach seems OK
- Connectors
- JTAG
- Connector for expansion - TBI: what type, etc
Clocking
- Modular - possibility to mount AUX (oscillator/clk) board to allow
- adding good oscillator for holdover
- replacing default oscillator with a better one for performance increase
- DDS for lpGBT
- Input clk to AD9516
- TBI: clocks other than 10MHz as inputs (e.g. 5MHz, 100MHz) - maybe as part of the AUX board
- Includ Low Jitter Daughterboard
CPU
- More memory for Linux - TBI: how much memory, DDR
- Storage memories: QSPI (recovery), eMMC (file system)