This reverts commit 2349460e.

This reverts commit 2349460e.

if the user design already includes the transceiver
(this change avoid inclusion of usless/conflicting xdc files)

Add generic: Artix7 gtp depends on rx_byte_is_aligned

See merge request !11

Update family7 gtx-lp and gthe4-lp, now using lpdc via wishbone mdio

See merge request !9

wrc_core sim for wrpc-v5 works

See merge request !10

Now, in testbench/wrc_core there are two folders - modelsim and riviera. Each of them contains
Manifest.py and run.do adjusted for the simulation with ModelSim/Riviera. One should navigate to
one of these folders to run the simulation with the corresponding simulator.

The streamers-on-spec_trigger-distribution testbench works now for wrpc-v5 in ModelSim.
However, it does not work with Riviera. The problem is that the secureip library cannot be
compiled for the spartan 6 and the Riviera version after 2008.

The testbench wrc_core for wrpc-v5 now works both with Riviera-PRO and ModelSim.
In Manifest.py, some lines should be commented out depending on the simulation tool (ModelSim or Riviera).
To run the simulation with Riviera, use run_riv.do.
To run the simulation with ModelSim, use run.do.

The testbench wrc_core for wrpc-v5 now works both with Riviera-PRO and ModelSim.
In Manifest.py, some lines should be commented out depending on the simulation tool (ModelSim or Riviera).
To run the simulation with Riviera, use run_riv.do.
To run the simulation with ModelSim, use run.do.

In wrpc-v5, LM32 is replaced by RISC-V. Hence, the new compiled WRPC software
for the simulation is added (wrc.bram file).
Also, the size of the RAM used by the WRPC software is increased.
The testbench sets hdl_testbench structure used for communication with the software.
The simulation works with ModelSim.

wr_softpll_ng: improved CDC logic. Fixes rare no-locks/FIFO errors, likely due to synthesizer doing some weird cross-clock-domains logic optimizations

... with the input clock

Tomasz Wlostowski authored 1 year ago and Tristan Gingold committed 1 year ago

wr_core: add generic for reverse DDMTD operation
wr_gtx_phy_kintex7_lp: make 'reversed' DDMTD operation a generic

boards: fix incorrect logic of reset input for aasd

See merge request !8

The arst_i input of gc_reset_multi_aasd is active high,
so the resets must be or-ed (using positive logic)