Wesley W. Terpstra authored 12 years ago and Grzegorz Daniluk committed 11 years ago

Previously on Altera, we used a generic to preload the firmware for WR.
This patch removes this as we can now preload with mif which compiles in
seconds instead of hours (quartus does not handle large generics well).

Conflicts:

	modules/wrc_core/wr_core.vhd
	modules/wrc_core/xwr_core.vhd

Tomasz Wlostowski authored 11 years ago and Grzegorz Daniluk committed 11 years ago

This may fix the WRs locking offsets issue & save a lot of FPGA resources.

Signed-off-by: Grzegorz Daniluk <grzegorz.daniluk@cern.ch>

Endpoint-RX_PAUSE: changing configuration to allow enabling both kinds of PAUSE (802.3 and 802.1Q), fixing bug for 802.3 - remembering wrong quanta

Endpoint-tx-injection: added handling situation when requested template is empty, prepared signals for RMON counters

endpoint/rx_path[bugfix]: masking out RTU request for received PAUSE frames (these frames never exit Endpoint). The bug (RTU request for no frame) where causing SWcore to go crazy

endpoint: added handling of priority-based Flow Control, exposed information about received PAUSE frames outside Endpoint - to be used by SWcore

endpoint: bugfix on tx path - frames to be transmitted where lost (not exited endpoint) if the start-of-cycle occured on stall (when the internal dreq was low)

pFilter: changed simulation driver so that the same mircocode can be nicely loaded many times to many ports

endpoint: small bugfixes in injection module and tx header processor + adding missing description to wbgen file

bugfix in eth packet simulation class. It was not possible to set pck size at initialization (new function) -- bug fixed

Endpoint: bugfix in h/w pck injection. The EOF signal generated when injecting h/w pck was not passed on the fabric.