wrc: remove initv option

Previously on Altera, we used a generic to preload the firmware for WR.
This patch removes this as we can now preload with mif which compiles in
seconds instead of hours (quartus does not handle large generics well).

Conflicts:

	modules/wrc_core/wr_core.vhd
	modules/wrc_core/xwr_core.vhd

modules/wrc_core/wr_core.vhd

@@ -67,8 +67,7 @@ entity wr_core is
     g_aux_clks                  : integer                        := 1;
     g_rx_buffer_size            : integer                        := 1024;
     g_dpram_initf               : string                         := "";
-    g_dpram_initv               : t_xwb_dpram_init               := c_xwb_dpram_init_nothing;
-    g_dpram_size                : integer                        := 20480;  --in 32-bit words
+    g_dpram_size                : integer                        := 90112/4;  --in 32-bit words
     g_interface_mode            : t_wishbone_interface_mode      := PIPELINED;
     g_address_granularity       : t_wishbone_address_granularity := WORD;
     g_aux_sdb                   : t_sdb_device                   := c_wrc_periph3_sdb
@@ -647,7 +646,6 @@ begin
     generic map(
       g_size                  => g_dpram_size,
       g_init_file             => g_dpram_initf,
-      g_init_value            => g_dpram_initv,
       g_must_have_init_file   => true,
       g_slave1_interface_mode => PIPELINED,
       g_slave2_interface_mode => PIPELINED,

modules/wrc_core/wrcore_pkg.vhd

@@ -291,7 +291,6 @@ constant c_wrc_periph3_sdb : t_sdb_device := (
       g_aux_clks                  : integer                        := 1;
       g_ep_rxbuf_size             : integer                        := 1024;
       g_dpram_initf               : string                         := "";
-      g_dpram_initv               : t_xwb_dpram_init               := c_xwb_dpram_init_nothing;
       g_dpram_size                : integer                        := 20480;  --in 32-bit words
       g_interface_mode            : t_wishbone_interface_mode      := CLASSIC;
       g_address_granularity       : t_wishbone_address_granularity := WORD;

modules/wrc_core/xwr_core.vhd

@@ -53,9 +53,8 @@ entity xwr_core is
     g_aux_clks                  : integer                        := 1;
     g_ep_rxbuf_size             : integer                        := 1024;
     g_dpram_initf               : string                         := "";
-    g_dpram_initv               : t_xwb_dpram_init               := c_xwb_dpram_init_nothing;
-    g_dpram_size                : integer                        := 20480;  --in 32-bit words
-    g_interface_mode            : t_wishbone_interface_mode      := CLASSIC;
+    g_dpram_size                : integer                        := 90112/4;  --in 32-bit words
+    g_interface_mode            : t_wishbone_interface_mode      := PIPELINED;
     g_address_granularity       : t_wishbone_address_granularity := WORD;
     g_aux_sdb                   : t_sdb_device                   := c_wrc_periph3_sdb
     );
@@ -200,7 +199,6 @@ architecture struct of xwr_core is
       g_aux_clks                  : integer                        := 1;
       g_rx_buffer_size            : integer                        := 12;
       g_dpram_initf               : string                         := "";
-      g_dpram_initv               : t_xwb_dpram_init               := c_xwb_dpram_init_nothing;
       g_dpram_size                : integer                        := 16384;  --in 32-bit words
       g_interface_mode            : t_wishbone_interface_mode      := CLASSIC;
       g_address_granularity       : t_wishbone_address_granularity := WORD;
@@ -332,7 +330,6 @@ begin
       g_with_external_clock_input => g_with_external_clock_input,
       g_aux_clks                  => g_aux_clks,
       g_dpram_initf               => g_dpram_initf,
-      g_dpram_initv               => g_dpram_initv,
       g_dpram_size                => g_dpram_size,
       g_interface_mode            => g_interface_mode,
       g_address_granularity       => g_address_granularity,