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Simple VME FMC Carrier SVEC
Commit 1097ade4 authored by Tristan Gingold's avatar Tristan Gingold
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vmespy: add 2e-vme

parent 93d8e6b1
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hdl/top/vmespy/svec_vmespy_top.vhd
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...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
-- Author(s) : Tristan Gingold <tristan.gingold@cern.ch> -- Author(s) : Tristan Gingold <tristan.gingold@cern.ch>
-- Company : CERN (BE-CO-HT) -- Company : CERN (BE-CO-HT)
-- Created : 2017-09-19 -- Created : 2017-09-19
-- Last update: 2020-01-16 -- Last update: 2020-01-28
-- Standard : VHDL'93 -- Standard : VHDL'93
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
-- Description: Top-level file for the test design . -- Description: Top-level file for the test design .
...@@ -218,11 +218,13 @@ begin -- architecture top ...@@ -218,11 +218,13 @@ begin -- architecture top
g_DECODE_AM => True, g_DECODE_AM => True,
g_USER_CSR_EXT => False, g_USER_CSR_EXT => False,
g_wb_granularity => BYTE, g_wb_granularity => BYTE,
g_VME_2E => True,
g_MANUFACTURER_ID => c_CERN_ID, g_MANUFACTURER_ID => c_CERN_ID,
g_BOARD_ID => c_SVEC_ID, g_BOARD_ID => c_SVEC_ID,
g_REVISION_ID => c_SVEC_REVISION_ID, g_REVISION_ID => c_SVEC_REVISION_ID,
g_PROGRAM_ID => c_SVEC_PROGRAM_ID) g_PROGRAM_ID => c_SVEC_PROGRAM_ID,
g_DECODER => c_vme64x_decoders_2e_default)
port map ( port map (
clk_i => clk_sys, clk_i => clk_sys,
rst_n_i => local_reset_n, rst_n_i => local_reset_n,
......
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