Programming languages used in this repository
-
VHDL
46.14 %
-
Verilog
25.67 %
-
SystemVerilog
10.93 %
-
C
9.39 %
-
Stata
2.99 %
-
HTML
2.17 %
-
Python
1.08 %
-
Lua
1.01 %
-
Makefile
0.38 %
-
Tcl
0.18 %
-
Shell
0.05 %
Commit statistics for master Jun 08 - Jul 29
- Total: 233 commits
- Average per day: 0.1 commits
- Authors: 9
Commits per day of month
Commits per weekday
Commits per day hour (UTC)