Programming languages used in this repository

  •   VHDL
    46.74 %
  •   Verilog
    25.98 %
  •   SystemVerilog
    11.07 %
  •   C
    8.4 %
  •   Stata
    3.02 %
  •   HTML
    2.2 %
  •   Python
    1.06 %
  •   Lua
    1.02 %
  •   Makefile
    0.28 %
  •   Tcl
    0.18 %
  •   Shell
    0.05 %

Commit statistics for master Jun 08 - Mar 10

  • Total: 169 commits
  • Average per day: 0.1 commits
  • Authors: 7

Commits per day of month

Commits per weekday

Commits per day hour (UTC)