Commit a50bdd3b authored by Pascal Bos's avatar Pascal Bos

Updated build scripts to generate a nice .bit and .mmi file name.


Ported mmi_to_elf_bit_file script to linux.


fixed missing pointer to shell
parent 0ff48eac
#! /bin/bash
proj_name=spec7_wr_ref_top
lm32_wrpc_elf=../../../sw/precompiled/wrps-sw_spec7/wrc.elf
lm32_wrpc_instpath=lm32_wrpc_memory
/opt/Xilinx/Vivado/2019.2/bin/updatemem -meminfo ./${proj_name}.mmi -data ${lm32_wrpc_elf} -bit ./work/${proj_name}.runs/impl_1/${proj_name}.bit -proc ${lm32_wrpc_instpath} -out ./work/${proj_name}.runs/impl_1/${proj_name}_elf.bit -force
......@@ -8,6 +8,8 @@ set proj_name spec7_wr_ref_top
set proj_dir work
set script_dir [pwd]/../../../sw/scripts
set lm32_wrpc_initf [pwd]/../../../sw/precompiled/wrps-sw_spec7/wrc.bram
set lm32_wrpc_elf [pwd]/../../../sw/precompiled/wrps-sw_spec7/wrc.elf
set lm32_wrpc_instpath "lm32_wrpc_memory"
# update revision except when argument "no_update_revison" is passed (as for example by viv_do_programm.tcl)
if {$argc == 0 || $argv != "no_update_revision"} {
......
#! /bin/bash
proj_name=spec7_write_top
lm32_wrpc_elf=../../../sw/precompiled/wrps-sw_spec7/wrc.elf
lm32_wrpc_instpath=lm32_wrpc_memory
/opt/Xilinx/Vivado/2019.2/bin/updatemem -meminfo ./${proj_name}.mmi -data ${lm32_wrpc_elf} -bit ./work/${proj_name}.runs/impl_1/${proj_name}.bit -proc ${lm32_wrpc_instpath} -out ./work/${proj_name}.runs/impl_1/${proj_name}_elf.bit -force
......@@ -8,7 +8,8 @@ set proj_name spec7_write_top
set proj_dir work
set script_dir [pwd]/../../../sw/scripts
set lm32_wrpc_initf [pwd]/../../../sw/precompiled/wrps-sw_spec7/wrc.bram
#set lm32_wrpc_initf [pwd]/../../../sw/precompiled/wrps-sw_spec7/wrc_ext10mhz.bram
set lm32_wrpc_elf [pwd]/../../../sw/precompiled/wrps-sw_spec7/wrc.elf
set lm32_wrpc_instpath "lm32_wrpc_memory"
# update revision except when argument "no_update_revison" is passed (as for example by viv_do_programm.tcl)
if {$argc == 0 || $argv != "no_update_revision"} {
......
......@@ -93,6 +93,11 @@ foreach line $content {
read_xdc -verbose $line
} elseif {[string range $line $line_length-4 $line_length] == ".tcl"} {
source $line
# making wrapper, using variable $design_name provided in xilinx TCL scripts.
make_wrapper -files [get_files ./$proj_dir/$proj_name.srcs/sources_1/bd/$design_name/$design_name.bd] -top
add_files -norecurse ./$proj_dir/$proj_name.srcs/sources_1/bd/$design_name/hdl/${design_name}_wrapper.vhd
set_property library work [get_files ./$proj_dir/$proj_name.srcs/sources_1/bd/$design_name/hdl/${design_name}_wrapper.vhd]
close_bd_design [get_bd_designs $design_name]
} elseif {[string range $line $line_length-4 $line_length] == ".bmm"} {
# Set pointer to bmm file if any
# puts "bmm"
......@@ -110,19 +115,24 @@ update_compile_order -fileset sources_1
# Pass generics
set_property generic $generics [current_fileset]
puts "INFO: Reading Source Files Done!"
# ------------------------------------------------------------------------------
source $script_dir/viv_do_synt.tcl
source $script_dir/viv_do_impl.tcl
if {$use_bmm} {
source $script_dir/viv_generate_bd_bmm.tcl
source $script_dir/viv_generate_bd_mmi.tcl
}
close_design
file copy -force $proj_dir/$proj_name.runs/impl_1/$proj_name.bit .
#generate a new name for .bit and .mmi file and copy to project directory.
set syn_dir [pwd]
cd ../../wr-cores/ ; set branchname [exec git branch --show-current] ; cd $syn_dir
set bitfile_name ${proj_name}_[string range $device 3 6]_[clock format [clock seconds] -format %y%m%d_%H:%M]_${branchname}
file copy ./work/${proj_name}.runs/impl_1/${proj_name}.bit ../${bitfile_name}.bit
file copy ./${proj_name}.mmi ../${bitfile_name}.mmi
# ------------------------------------------------------------------------------
\ No newline at end of file
# ------------------------------------------------------------------------------
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