SPEC Fan design files released
added by Tomasz Wlostowski on 2015-03-30 10:35:16.367652
We have released the official documentation for the mezzanine cooling fan designed to fit the SPEC board. The fan design is described on this page.
18-12-13: Labview drivers for SPEXI and SPEC
added by Erik van der Bij on 2013-12-18 10:53:20.579823
The company INCAA has written Labview drivers for the FMC
DEL 1ns 4cha and
FMC TDC 1ns 5cha mezzanine
cards. These drivers work both for the PCIe-based SPEC
carrier and PXIe-based SPEXI
The source code of the drivers is available under the GPL license.
16-01-2013: Production test improved
added by Erik van der Bij on 2013-01-16 08:42:56.378239
Open Hardware doesn't stop at just having a good hardware design. We at CERN believe it is also important to provide a good production test system with the hardware to ease the manufacturing process. For this we have set up a testing environment, called PTS.
The SPEC board also has a range of tests that can run in the PTS environment that has been used to test the cards after production. The company Seven Solutions has just improved the Production Test Suite (PTS) of the SPEC board so that now all memory addresses lines are tested and that boards will not signalled to be defective while they actually are OK. Also the speed of testing has improved. Companies producing the SPEC board should take the latest version out of the PTS repository.
The files that have been modified are:
- test/spec/python/gn4124.py (so that this DMA library automatically configures the Interrupt enable mask register)
- test/spec/python/test07.py (so that all the address lines are checked and the test procedure is accelerated)
- test/spec/firmware/test07.bin (to correct the intermittent-error generation)
03-07-2012: Delivery of 52 SPEC boards
added by Erik van der Bij on 2012-07-03 16:21:15.879106
It's getting serious now as we received at CERN four boxes with in total
52 SPEC boards from the company Seven
Solutions. All boards
are individually packed and have an LHC barcode on it that will ease us
entering the cards in our equipment database.
These boards will be used together with ADC, Fine Delay and digital I/O mezzanines, often in combination with firmware supporting White Rabbit and therefore giving precise time stamping of data.
12-06-2012: SPEC passes EMC tests
added by Erik van der Bij on 2012-06-12 17:29:06.110610
The SPEC board together with a 5 channel Digital I/O card have passed the most restrictive EMC tests of each class (domestic and industrial) successfully:
- EM Radiated Emission: Class B (Domestic) EN 55022 (2006) / A1 (2007)
- EM Immunity (Industrial): EN 61000-4-3 (2006) / A1 (2008) / A2
(2010), EN 61000-4-4 (2004) / A1 (2010) / Corr (2010), EN 61000-4-6
61000-4-2 (2009), EN 61000-4-8 (2010).
The test report is publicly available.
25-04-2012: SPEC boards running in Siberia!
added by Erik van der Bij on 2012-04-25 14:52:14.162164
First field tests of two SPEC boards running a White Rabbit timing link between them have been made in Siberia. These tests are made by DESY to verify the usability of the board at the Gamma-Ray and Cosmic-Ray experiment HiSCORE-EA at the Tunka site. Full results of the tests will be made available soon. Two kilometres of fibre where outside, while the SPEC boards were nicely warm inside the counting room.
05-01-2012: 70 SPEC cards produced in 2011
added by Erik van der Bij on 2012-01-05 13:32:24.681807
In the year 2011 the company Creotech has produced and sold fifty SPEC boards. With the twenty cards from the pre-production of the seventy that CERN has ordered from the company Seven Solutions, in total seventy SPEC boards have been produced in 2011.
11-11-2011: 20 cards commercially produced
added by Erik van der Bij on 2011-11-11 16:50:16.416408
The pre-series of the first commercial series production of SPEC cards has succeeded. After repairing some assembly problem with the FMC connector, all twenty cards passed the test on the test bench that was prepared by CERN. The cards will be sent to CERN for a final inspection before giving the OK to produce another fifty.
13-10-2011: CE EMC tests will be made
added by Erik van der Bij on 2011-10-13 10:22:26.384629
CERN has placed an order for EMC testing according to EN 55022(2006) /A1(2007) + EN 55024(1998)/A1 (2001)/A2(2003). Once these tests are done, it will allow the board to carry the CE approval.
26-08-2011: Absolutely ready for production!
added by Erik van der Bij on 2011-08-26 14:33:29.092379
The modification for a better mechanical fit has been made and halogen-PCBs will be ordered to start the first series production of SPEC boards.
A serious piece of automated test software has been made that will check all soldered connections on the board and that will measure the different supply voltages. This is all possible because of the groundwork done by the Production Test Suite project software logically called PTS and the FMC Carrier tester test card that measures all connections to the FMC connector. We have used these to create the "PTS for SPEC" production software. The user manual gives a good overview of the ease of use.
We are now ready to send a complete test bench (PC, SPEC reference card, FMC test card, cables etc.) to the company that will produce and test 70 boards. First 10 though, just to be sure...
22-08-2011: V3 ready, let's go for V4!
added by Erik van der Bij on 2011-08-22 17:54:09.329196
The V3 of the design was ready for production on 22 July. We'd like to
produce 70 of those cards of this version, apart from the fact that a
user at GSI just found a mechanical problem that could appear with a
certain combination of SFP plugin and PC type. Being just in time to
correct this by simply moving the SFP 2.5 mm further out on the PCB, we
decided to make a V4 of the PCB.
Why a V4 while the V3 never was produced? As this will ease the tracibility as possibly copies of this Open Design design may already be around!
01-07-2011: V2 boards tested
added by Erik van der Bij on 2011-07-01 17:53:18.152267
Three V2 boards have been received. One has already passed the full
production suite, two others have only received a very short test (and
passed). This means that this version can be used to start a series
Actually there is still a not-understood issue that we don't manage to get communication between the two SATA connectors working, while from each one to the FMC test board works OK. We are currently looking into that and believe it is only a firmware problem.
31-05-2011: Production test software working
added by Erik van der Bij on 2011-06-01 17:38:26.073429
For the production of the SPEC cards specific production software has been written and demonstrated. This software provides a simple go/no-go interface with logging facilities to easily find production errors. The software is written in Python and uses a CERN-written test environment called Bakara. To test the connectivity FMC connector on the SPEC card, a specific FMC carrier test card is developed that is also able to measure the different power supplies and test the different gigabit links.
13-05-2011: V2 ready. Pre-production boards will be built.
added by Erik van der Bij on 2011-05-17 10:00:50.554277
The layout of the V2 of the SPEC board is ready. It is an improvement of version "1.1". We will build 3 of these pre-production boards before we will order 70 boards. Two production test benches are being set up.
11-05-2011: Design review of V2 held
added by Erik van der Bij on 2011-05-12 16:54:26.433334
Five engineers have reviewed version 2 of the SPEC card. Many small changes have been made to make the board better producable. E.g. instead of 23 resistor values only 10 will be needed. The production files will soon be generated by CERN's design office.
24-02-2011: Design review of "V1.1" on 1/3/11
added by Erik van der Bij on 2011-02-24 17:48:43.314040
The debugging of the SPEC card is going really fine: all active
components are fully tested, and most of the slow connections on the FMC
connectors are tested with the fine delay module.
As there is an urgent request for more SPEC cards, notably for the development of White Rabbit end nodes by CERN's partners, the team has been working of solving of all outstanding Issues and making a version "1.1" of the PCB.
On the first of March we will therefore review the updated schematics and PCB layout, after which a quick production of ten cards will be made.
In parallel, the new design will then be verified by CERN's design office to generate standardised production files. If everything goes well, it will be these files that will be used for a first production of around 50 SPEC cards.
First DMA transfer to/from DDR3
added by Anonymous on 2011-02-08 14:35:34.866241
A first DMA transfer to the SPEC DDR3 and back to the host has been done
The DDR3 interface seems to work well, but more exhaustive test of the DDR3 interface are still to be done.
19-01-2011: 3 SPEC cards arrived at CERN
added by Erik van der Bij on 2011-01-19 13:25:06.111342
Three cards arrived at CERN. After delivery to our offices they will immediately be powered on.
05-11-2010: PCB layout finished. Prototypes by mid December.
added by Erik van der Bij on 2010-11-08 08:32:28.167585
After several reviews the PCB layout of the Simple PCIe FMC carrier is finalised. CERN's design office verified the design and created standard production files. Three prototype boards will be produced and assembled in Poland before being sent to CERN by mid December.
10-09-2010: PCB layout start
added by Erik van der Bij on 2010-09-10 14:04:19.329446
The comments from the schematics review have been taken into account and PCB layout starts. The aim is to make a low cost 6-layer board (cf. a 12-layer one for the more complex FMC PCIe Carrier - PFC), while paying much attention to signal quality issues such as signals crossing splits in the power planes.
07-09-2010: Schematics review held
added by Erik van der Bij on 2010-09-08 17:30:34.872228
The third schematics review of the Simple PCI Express FMC carrier has been held. Some improvements and simplifications of the schematics are required, after which the PCB layout can be started.
23-06-2010: Project started
added by Erik van der Bij on 2010-06-23 13:57:40.541075
After having seen the complexity of the FMC PCI carrier project, with its many resources that are likely not used for many applications and that increase the cost, it has been decided to make a cost optimised version of this card. The design will be done by a company, with a tight interaction with CERN. The project will be run with the Open Hardware paradigm and the design files will be made available via this site.