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Hdlmake
Commit 92c32a9f authored by Javier D. Garcia-Lasheras's avatar Javier D. Garcia-Lasheras
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Add RAM file support to Vivado

parent 3285708c
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Showing with 8 additions and 2 deletions
hdlmake/srcfile.py
View file @ 92c32a9f
...@@ -177,6 +177,11 @@ class MIFFile(File): ...@@ -177,6 +177,11 @@ class MIFFile(File):
pass pass
class RAMFile(File):
"""Xilinx RAM File"""
pass
class XCIFile(File): class XCIFile(File):
"""Xilinx Core IP File""" """Xilinx Core IP File"""
pass pass
...@@ -196,6 +201,7 @@ XILINX_FILE_DICT = { ...@@ -196,6 +201,7 @@ XILINX_FILE_DICT = {
'xdc': XDCFile, 'xdc': XDCFile,
'coe': COEFile, 'coe': COEFile,
'mif': MIFFile, 'mif': MIFFile,
'ram': RAMFile,
'xci': XCIFile} 'xci': XCIFile}
......
hdlmake/tools/vivado.py
View file @ 92c32a9f
...@@ -29,7 +29,7 @@ from .xilinx import ToolXilinx ...@@ -29,7 +29,7 @@ from .xilinx import ToolXilinx
from .make_sim import ToolSim from .make_sim import ToolSim
from hdlmake.srcfile import (XDCFile, XCIFile, NGCFile, XMPFile, from hdlmake.srcfile import (XDCFile, XCIFile, NGCFile, XMPFile,
XCOFile, COEFile, BDFile, TCLFile, XCOFile, COEFile, BDFile, TCLFile,
MIFFile) MIFFile, RAMFile)
class ToolVivado(ToolXilinx, ToolSim): class ToolVivado(ToolXilinx, ToolSim):
...@@ -48,7 +48,7 @@ class ToolVivado(ToolXilinx, ToolSim): ...@@ -48,7 +48,7 @@ class ToolVivado(ToolXilinx, ToolSim):
SUPPORTED_FILES = [XDCFile, XCIFile, NGCFile, XMPFile, SUPPORTED_FILES = [XDCFile, XCIFile, NGCFile, XMPFile,
XCOFile, COEFile, BDFile, TCLFile, XCOFile, COEFile, BDFile, TCLFile,
MIFFile] MIFFile, RAMFile]
CLEAN_TARGETS = {'clean': ["run.tcl", ".Xil", "*.jou", "*.log", "*.pb", CLEAN_TARGETS = {'clean': ["run.tcl", ".Xil", "*.jou", "*.log", "*.pb",
"$(PROJECT).cache", "$(PROJECT).data", "work", "$(PROJECT).cache", "$(PROJECT).data", "work",
......
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