wb_uart: testbench with regression cases against different combinations of FIFOs…

wb_uart: testbench with regression cases against different combinations of FIFOs & VUART functionality

wb_uart: testbench with regression cases against different combinations of FIFOs…
wb_uart: testbench with regression cases against different combinations of FIFOs & VUART functionality
e38b5280 · Tomasz Wlostowski · 568f79d4 · e38b5280 · e38b5280 · e38b5280
Commit e38b5280 authored Mar 10, 2023 by Tomasz Wlostowski
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main.sv testbench/wishbone/wb_uart/main.sv +426 -251

run.do testbench/wishbone/wb_uart/run.do +2 -3

wave.do testbench/wishbone/wb_uart/wave.do +56 -72

No files found.
--- a/testbench/wishbone/wb_uart/main.sv
+++ b/testbench/wishbone/wb_uart/main.sv
--- a/testbench/wishbone/wb_uart/run.do
+++ b/testbench/wishbone/wb_uart/run.do
-#vlog -sv main.sv +incdir+. +incdir+../../include/wb +incdir+../include/vme64x_bfm +incdir+../../include +incdir+../include +incdir+../../sim
 set StdArithNoWarnings 1
 set NumericStdNoWarnings 1

-vsim -L unisim -L XilinxCoreLib  work.main -voptargs=+acc -t 10fs
+vsim work.main -voptargs=+acc

 set StdArithNoWarnings 1
 set NumericStdNoWarnings 1

 do wave.do
 radix -hexadecimal
-run 10ms
\ No newline at end of file
+run 200ms
--- a/testbench/wishbone/wb_uart/wave.do
+++ b/testbench/wishbone/wb_uart/wave.do