Programming languages used in this repository

  •   Verilog
    47.42 %
  •   VHDL
    46.28 %
  •   C
    2.48 %
  •   SystemVerilog
    0.95 %
  •   Python
    0.94 %
  •   Stata
    0.53 %
  •   Assembly
    0.45 %
  •   Lua
    0.36 %
  •   Makefile
    0.32 %
  •   Tcl
    0.23 %
  •   Shell
    0.02 %
  •   C++
    0.02 %

Commit statistics for master Apr 18 - Jul 24

  • Total: 863 commits
  • Average per day: 0.3 commits
  • Authors: 25

Commits per day of month

Commits per weekday

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