Commits · f35ba5efe43dba18233de620d8129c42a64ba9ea · Projects / Platform-independent core collection · GitLab

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Oct 31, 2017
- axi4: add 512-bit data width AXI4-full record, fixed compilation issue in axi->wb bridge · f35ba5ef
  Tomasz Wlostowski authored 7 years ago
  
  f35ba5ef
Sep 06, 2017
- xwb_lm32: don't include wr_node/mockturtle profile in the VHDL wrapper · ead21137
  Tomasz Wlostowski authored 7 years ago
  
  ead21137
- wb_axi4lite_bridge: now conforms to AXI4 standard · 3f54f894
  Tomasz Wlostowski authored 7 years ago
  
  3f54f894
Aug 18, 2017
- adding wb to axi4lite bridge by Tom · 02f31207
  Grzegorz Daniluk authored 7 years ago
  
  02f31207
Aug 16, 2017
- genrams: ram initialization functions should be impure · 7c3da268
  Grzegorz Daniluk authored 7 years ago
  
  7c3da268
Aug 15, 2017
- lm32: fix strip_undefined function for Vivado · b80a1923
  Grzegorz Daniluk authored 7 years ago
```
Fix it the same way as f_x_to_zero() is fixed in wbgen.
```
  b80a1923
- wb_uart: regenerate wb interface with latest wbgen · 4cb25af4
  Grzegorz Daniluk authored 7 years ago
```
It fixes some functions not well understood by Vivado synthesis
```
  4cb25af4
Aug 10, 2017
- common/gc_sync_ffs: add synchronizer attribute for Vivado · 6fc6192b
  Grzegorz Daniluk authored 7 years ago
  
  6fc6192b
Aug 08, 2017
- genrams/xilinx: speedup RAM initialization for most common widths (mainly for Vivado) · 1d3df226
  Grzegorz Daniluk authored 7 years ago
  
  1d3df226
Aug 04, 2017
- genrams/xilinx: split ports to separate processes for Vivado synthesis · ffa8a511
  Grzegorz Daniluk authored 7 years ago
  
  ffa8a511
Aug 03, 2017
- wb_lm32: remove non synthesizable code when generating lm32_allprofiles.v · 2bafa55b
  Grzegorz Daniluk authored 7 years ago
  
  2bafa55b
Jun 23, 2017
- inferred_sync_fifo: bugfix of almost_full/empty · 96295346
  Maciej Lipinski authored 7 years ago and Grzegorz Daniluk committed 7 years ago
```
it was de-asserted at wrong value (too early/late). This was making
to misbehave the modules that depend on this signals.
```
  wrpc-v4.1
  
  96295346
May 02, 2017
- generic_shiftreg_fifo: assert almost_full_o one cycle in advance · 6db1d955
  Tomasz Wlostowski authored 8 years ago
  
  6db1d955
Mar 16, 2017
- wb_pcie: increased size of clk crossing buffer · 9cc9792e
  Stefan Rauch authored 8 years ago
  
  9cc9792e
Feb 20, 2017
- Merge branch 'greg_ram_init' into proposed_master · c0614a39
  Grzegorz Daniluk authored 8 years ago
  
  wrpc-v4.0
  
  c0614a39
Feb 14, 2017
- wb_dpram: no need to split into 4 BRAMs with generic_dpram_split inside generic_dpram · 0973db51
  Grzegorz Daniluk authored 8 years ago
  
  0973db51
- genrams: instantiate splitram in generic_dpram · 2f75877d
  Grzegorz Daniluk authored 8 years ago
  
  2f75877d
- genrams: move f_check_bounds to the package · 21e552ef
  Grzegorz Daniluk authored 8 years ago
  
  21e552ef
- genrams/dpram: split dpram also when initialized · 2a38b2a8
  Grzegorz Daniluk authored 8 years ago
  
  2a38b2a8
- genrams: simplify RAM initialization during synthesis · c283c216
  Grzegorz Daniluk authored 8 years ago
```
New function expects textfile with binary representation of each word in a
separate line, e.g.:
10011000000000000000000000000000
11010000000000000000000000000000
11010000001000000000000000000000
01111000000000010000000000000000
00111000001000010000000000000000

This for example reduces WRPC SPEC reference design synthesis time from ~26
minutes to ~11 minutes.
```
  c283c216
Feb 03, 2017
- minor improvements to reduce number of warnings generated by some of the cores · b833b5d8
  Dimitris Lampridis authored 8 years ago
  
  b833b5d8
Dec 15, 2016
- hdl: added modification notices · 0d75c0fd
  Jan Pospisil authored 8 years ago and Dimitris Lampridis committed 8 years ago
```
Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>
```
  0d75c0fd
- doc: added copy of original documentation for wb_spi and wb_onewire_master · e745dc3b
  Jan Pospisil authored 8 years ago and Dimitris Lampridis committed 8 years ago
```
Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>
```
  e745dc3b
- wb_onewire_master: propagated CDR_N/O generics up the hierarchy; added... · d3575021
  Jan Pospisil authored 8 years ago and Dimitris Lampridis committed 8 years ago
```
wb_onewire_master: propagated CDR_N/O generics up the hierarchy; added assignments to (new) unspecified WB signals

Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>
```
  d3575021
- wb_onewire_master: added default values; typos · 73ae91e6
  Jan Pospisil authored 8 years ago and Dimitris Lampridis committed 8 years ago
```
Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>
```
  73ae91e6
- gc_sync_register: added ASYNC_REG attribute for better timing analysis/simulation in Xilinx tools · 7acfff5e
  Jan Pospisil authored 8 years ago and Dimitris Lampridis committed 8 years ago
```
Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>
```
  7acfff5e
- gc_serial_dac: removed synchronous reset from sensitivity lists · 8cc13a10
  Jan Pospisil authored 8 years ago and Dimitris Lampridis committed 8 years ago
```
Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>
```
  8cc13a10
- hdl: added assignments to (new) unspecified WB signals · bebe354f
  Jan Pospisil authored 8 years ago and Dimitris Lampridis committed 8 years ago
```
Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>
```
  bebe354f
- hdl: added default values for determined start-up state · c2e0159c
  Jan Pospisil authored 8 years ago and Dimitris Lampridis committed 8 years ago
```
Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>
```
  c2e0159c
Nov 29, 2016
- common: introduced f_bool2int() and f_int2bool() conversion functions · f4f85996
  Dimitris Lampridis authored 8 years ago
  
  f4f85996
Nov 28, 2016
- common/gc_i2c_slave: added option to allow automatic ACK of address byte... · b2d2209d
  Dimitris Lampridis authored 8 years ago
```
common/gc_i2c_slave: added option to allow automatic ACK of address byte without external user intervention
```
  b2d2209d
Nov 23, 2016
- sdb crossbar: #1401 fixed. Now properly handling sdb meta records · 9c2a6c16
  Mathias Kreider authored 8 years ago
  
  9c2a6c16
- Merge remote branch 'proposed_master' of ohwr.org:hdl-core-lib/general-cores into proposed_master · ebaf955e
  Mathias Kreider authored 8 years ago
  
  ebaf955e
Nov 17, 2016
- Merge remote-tracking branch 'origin/ML-Btrain-review-feedback' into proposed_master · 076d89de
  Dimitris Lampridis authored 8 years ago
  
  076d89de
Oct 27, 2016
- Merge branch 'master' into proposed_master · 2782bc8c
  Dimitris Lampridis authored 8 years ago
  
  2782bc8c
- Merge branch 'hotfix-sdb_commit_id_reversed_nibbles' · 6aa8e458
  Dimitris Lampridis authored 8 years ago
  
  6aa8e458
- sdb: fix nibble order in commit_id field of SDB synthesis record. Closes #1399. · 2943524e
  Dimitris Lampridis authored 8 years ago
```
This was due to a bug in the f_string2bits() which took the commit ID as a string argument, assuming that the character array of the string is (32 downto 1), while in fact the commit_id is a string(1 to 32).

f_string2bits() is now  more resilient, it works with both "up" and "downto" string arguments, by checking the "ascending" attribute of the string type.
```
  2943524e
- Merge branch 'hotfix-genram_xc6v_fix' · 4ec58596
  Dimitris Lampridis authored 8 years ago
  
  4ec58596
Oct 17, 2016
- wb: replaced xwb_register_link with more performant version · 9d8cbbdb
  Mathias Kreider authored 8 years ago
  
  9d8cbbdb
Oct 05, 2016
- genrams: fix problem with missing inferred fifos when target is xilinx virtex6. Solves #1396. · 40ea4c07
  Dimitris Lampridis authored 8 years ago
  
  40ea4c07