- Mar 05, 2020
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Tristan Gingold authored
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Dimitris Lampridis authored
Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
Reported by Olof Olof Kindgren (@olofk). See also merge request !4 . Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
This allows them to be used right after in component declarations. Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
This is especially beneficial when trying to meet timing in the GN4124 core (on Spartan6), where the async FIFOs are clocked on one side at 200MHz. Apparently, the KEEP_HIERARCHY attribute makes it much easier for ISE 14.7 to reach timing closure. It also helps in general to ensure that the synchronisation structures remain intact and do not get merged in unpredictable ways with other parts of the design. Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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- Mar 04, 2020
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Tristan Gingold authored
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- Mar 03, 2020
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Tristan Gingold authored
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Tristan Gingold authored
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Tristan Gingold authored
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- Feb 19, 2020
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Christos Gentsos authored
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Christos Gentsos authored
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- Jan 30, 2020
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Tristan Gingold authored
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Tristan Gingold authored
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- Dec 13, 2019
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Dimitris Lampridis authored
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- Sep 09, 2019
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Dimitris Lampridis authored
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- Aug 07, 2019
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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- Aug 02, 2019
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Dimitris Lampridis authored
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- Aug 01, 2019
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Tristan Gingold authored
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Tristan Gingold authored
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- Jul 29, 2019
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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Dimitris Lampridis authored
Without this option, the two outputs of the module are in different clock domains. The frequency value is in the clk_in domain, while the "valid" flag is in the system clock domain. With the new option, if set to TRUE, both outputs will be in the system clock domain.
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Dimitris Lampridis authored
This commit does three changes to gc_sync_word_wr: 1. It converts it to use internally gc_pulse_synchroniser2 2. It introduces a new "busy" output bit 3. It introduces a new generic, g_AUTO_WR which instructs the core to write a new word continously, without input from the user.
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Dimitris Lampridis authored
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- Jul 24, 2019
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Dimitris Lampridis authored
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- Jul 19, 2019
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Tristan Gingold authored
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Tristan Gingold authored
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- Jul 15, 2019
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Tristan Gingold authored
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Tristan Gingold authored
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- Jul 11, 2019
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Tristan Gingold authored
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Tristan Gingold authored
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- Jul 10, 2019
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Grzegorz Daniluk authored
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- Jun 19, 2019
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Tristan Gingold authored
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Tristan Gingold authored
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Tristan Gingold authored
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- Jun 17, 2019
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Tristan Gingold authored
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Tristan Gingold authored
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Tristan Gingold authored
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