- Jul 31, 2014
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Theodor-Adrian Stana authored
This is done to better reflect the interface of the module (structured Wishbone). The documentation of the module is also changed in this respect.
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Theodor-Adrian Stana authored
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- May 20, 2014
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Matthieu Cattin authored
It was causing the simulation to fail with designs containing a xwb_register_link component.
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- Apr 25, 2014
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Matthieu Cattin authored
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- Apr 17, 2014
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Wesley W. Terpstra authored
Using the volatile configuration register to configure a flash chip is a bad idea. The problem is that if the FPGA is reset, the flash may be in a state inconsistent with what the FPGA requires to boot. The correct solution is to configure the non-volatile configuration register on the chip to what the FPGA expects on power-on. Then use these same settings inside the flash core. Going this route makes it necessary for software to be able to set the non-volatile configuration register. Rather than making the core even more complicated than it is, I have elected to add a FIFO which software can fill to issue custom SPI commands. Since erase can only be done from software anyway, I removed this code and let erase use the custom command FIFO.
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- Mar 28, 2014
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Theodor-Adrian Stana authored
This is done by adding a generic to the entity, which is connected directly to the gc_fsm_watchdog component instantiated within the wb_i2c_bridge. The user should calculate the appropriate watchdog timeout value and set it via this generic. The instantiation template in the wishbone_pkg is also updated. Signed-off-by:
Theodor Stana <t.stana@cern.ch>
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- Feb 27, 2014
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Mathias Kreider authored
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- Feb 06, 2014
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This change is necessary for network control/monitor tool in order to read the GUI command output. The GUI command output can not be stored into a 1024 bytes fifo.
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- Jan 21, 2014
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Mathias Kreider authored
wb_irq_slave: added clear and enable registers
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- Jan 09, 2014
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- I2C slave component now samples SDA line one rising SCL and changes states and shifts out bits on its falling edge - I2C slave component has clearer status outputs - bridge component changed to reflect changes in I2C slave interface - bridge component also returns to IDLE state on I2C stop condition, as reflected by the I2C slave Signed-off-by:
Theodor Stana <t.stana@cern.ch> Signed-off-by:
Tomasz Włostowski <tomasz.wlostowski@cern.ch>
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- gc_i2c_slave -- generic I2C slave to be used with a processor or tied to a Wishbone interface - gc_glitch_filter -- glitch filter with selectable number of taps - wb_i2c_bridge -- I2C bridge implementing the protocol defined with ELMA for monitoring VME crates - wb_xil_multiboot -- module that accesses the Spartan-6 configuration logic for reconfiguring the FPGA using MultiBoot Doc files for each of these modules can be found in the doc/ folder. Signed-off-by:
Theodor Stana <t.stana@cern.ch> Signed-off-by:
Tomasz Włostowski <tomasz.wlostowski@cern.ch>
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- Dec 20, 2013
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Wesley W. Terpstra authored
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- Dec 18, 2013
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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- Nov 22, 2013
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- Oct 25, 2013
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Mathias Kreider authored
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- Oct 24, 2013
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Mathias Kreider authored
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- Oct 18, 2013
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Mathias Kreider authored
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- Sep 24, 2013
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Wesley W. Terpstra authored
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- Sep 18, 2013
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
c_status_time was one cycle longer than it should be! this led to the arria5 requiring g_dummy_time-1 in c_vstatus_data ==> after fixing: must increase g_input_to_output_cycles on arria5 there was also a wrong calculation for s_wip with single-lane mode it was working also by luck because WEL and WIP are usually set together and are side-by-side, thus masking the c_status_time bug.
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Wesley W. Terpstra authored
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- Sep 03, 2013
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Mathias Kreider authored
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- Sep 02, 2013
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Mathias Kreider authored
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- Aug 30, 2013
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Wesley W. Terpstra authored
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- Jun 24, 2013
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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Supports sdb_repo_url and sdb_synthesis records. sdb-crossbar: add support for meta-information records. A new generic (g_info) is available to add an array of meta-inforamtion records to the sdb rom. sdb-crossbar: add boolean generic to use meta-information records. Can't find out how to initialise an array with a null-range. wishbone_pkg: add default value to meta-information generic. sdb-crossbar: fix conditional constant declaration sdb-crossbar: use a function to initialise number of info entries constant. sdb-crossbar: fix syntax error in function. wishbone_pkg: add embed/extract function for repo-url and synthesis records. wishbone_pkg: Change some meta-info fields to string and add string manip functions. wishbone_pkg: Change syn_commit_id type to string. wishbone_pkg: Fix syntax error. wishbone_pkg: Fix index bug in string manip functions. wishbone_pkg: Fix range bug in string manip function. wishbone_pkg: add integration record support. sdb-crossbar: Fix range issue with meta-info records.
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- May 21, 2013
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Grzegorz Daniluk authored
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- Apr 25, 2013
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Wesley W. Terpstra authored
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- Apr 23, 2013
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Wesley W. Terpstra authored
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- Apr 15, 2013
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Wesley W. Terpstra authored
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- Apr 05, 2013
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Wesley W. Terpstra authored
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- Mar 08, 2013
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Tomasz Wlostowski authored
Conflicts: modules/wishbone/wishbone_pkg.vhd
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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- Mar 05, 2013
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Wesley W. Terpstra authored
In the past we used a generic to set the initial memory contents on altera. Unfortunately, quartus compiles big generics slowly (read: hours). Now we can load from a .mif file instead, which is much faster (seconds). Thus, this old option is no longer needed.
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- Feb 26, 2013
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Wesley W. Terpstra authored
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- Feb 25, 2013
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Wesley W. Terpstra authored
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