Commit d6d564cf authored by Federico Vaga's avatar Federico Vaga

drv: add VME DDR offset field to platform data

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 7921b89f
...@@ -630,6 +630,7 @@ static void fa_sg_alloc_table_init(struct fa_dev *fa) ...@@ -630,6 +630,7 @@ static void fa_sg_alloc_table_init(struct fa_dev *fa)
static struct fmc_adc_platform_data fmc_adc_pdata_default = { static struct fmc_adc_platform_data fmc_adc_pdata_default = {
.flags = 0, .flags = 0,
.vme_ddr_offset = 0,
.calib_trig_time = 0, .calib_trig_time = 0,
.calib_trig_threshold = 0, .calib_trig_threshold = 0,
.calib_trig_internal = 0, .calib_trig_internal = 0,
......
...@@ -155,10 +155,10 @@ static void fa_dma_release_channel_svec(struct fa_dev *fa) ...@@ -155,10 +155,10 @@ static void fa_dma_release_channel_svec(struct fa_dev *fa)
} }
static uint32_t zfad_dev_mem_offset(struct zio_cset *cset) static uint32_t fa_ddr_offset_single(struct fa_dev *fa)
{ {
struct fa_dev *fa = cset->zdev->priv_d; struct zio_cset *cset = fa->zdev->cset;
uint32_t dev_mem_off, trg_pos, pre_samp; uint32_t off, trg_pos, pre_samp;
int nchan = FA100M14B4C_NCHAN; int nchan = FA100M14B4C_NCHAN;
struct zio_control *ctrl = cset->chan[nchan].current_ctrl; struct zio_control *ctrl = cset->chan[nchan].current_ctrl;
...@@ -171,12 +171,35 @@ static uint32_t zfad_dev_mem_offset(struct zio_cset *cset) ...@@ -171,12 +171,35 @@ static uint32_t zfad_dev_mem_offset(struct zio_cset *cset)
* compute mem offset (in bytes): pre-samp is converted to * compute mem offset (in bytes): pre-samp is converted to
* bytes * bytes
*/ */
dev_mem_off = trg_pos - (pre_samp * cset->ssize * nchan); off = trg_pos - (pre_samp * cset->ssize * nchan);
dev_dbg(fa->msgdev, dev_dbg(fa->msgdev,
"Trigger @ 0x%08x, pre_samp %i, offset 0x%08x\n", "Trigger @ 0x%08x, pre_samp %i, offset 0x%08x\n",
trg_pos, pre_samp, dev_mem_off); trg_pos, pre_samp, off);
return off;
}
static uint32_t fa_ddr_offset_multi(struct fa_dev *fa, uint32_t shot_n)
{
struct zio_cset *cset = fa->zdev->cset;
uint32_t off;
return dev_mem_off; off = cset->interleave->current_ctrl->ssize * cset->ti->nsamples;
off += FA_TRIG_TIMETAG_BYTES;
off *= shot_n;
return off;
}
static uint32_t fa_ddr_offset(struct fa_dev *fa, uint32_t shot_n)
{
WARN(fa->n_shots == 1 && shot_n != 0,
"Inconsistent shot number %d\n", shot_n);
if (fa->n_shots == 1) {
return fa_ddr_offset_single(fa);
} else {
return fa_ddr_offset_multi(fa, shot_n);
}
} }
static unsigned int zfad_block_n_pages(struct zio_block *block) static unsigned int zfad_block_n_pages(struct zio_block *block)
...@@ -476,7 +499,6 @@ static int zfad_dma_start(struct zio_cset *cset) ...@@ -476,7 +499,6 @@ static int zfad_dma_start(struct zio_cset *cset)
struct fa_dev *fa = cset->zdev->priv_d; struct fa_dev *fa = cset->zdev->priv_d;
struct zfad_block *zfad_block = cset->interleave->priv_d; struct zfad_block *zfad_block = cset->interleave->priv_d;
struct dma_slave_config sconfig; struct dma_slave_config sconfig;
unsigned int data_offset;
int err, i; int err, i;
err = fa_fsm_wait_state(fa, FA100M14B4C_STATE_IDLE, 10); err = fa_fsm_wait_state(fa, FA100M14B4C_STATE_IDLE, 10);
...@@ -501,7 +523,6 @@ static int zfad_dma_start(struct zio_cset *cset) ...@@ -501,7 +523,6 @@ static int zfad_dma_start(struct zio_cset *cset)
memset(&sconfig, 0, sizeof(sconfig)); memset(&sconfig, 0, sizeof(sconfig));
sconfig.direction = DMA_DEV_TO_MEM; sconfig.direction = DMA_DEV_TO_MEM;
sconfig.src_addr_width = 8; /* 2 bytes for each channel (4) */ sconfig.src_addr_width = 8; /* 2 bytes for each channel (4) */
data_offset = (cset->interleave->current_ctrl->ssize * cset->ti->nsamples) + FA_TRIG_TIMETAG_BYTES;
for (i = 0; i < fa->n_shots; ++i) { for (i = 0; i < fa->n_shots; ++i) {
/* /*
* TODO * TODO
...@@ -514,10 +535,7 @@ static int zfad_dma_start(struct zio_cset *cset) ...@@ -514,10 +535,7 @@ static int zfad_dma_start(struct zio_cset *cset)
* But sice the blocks are contigous, perhaps there is no need * But sice the blocks are contigous, perhaps there is no need
* because the address of shot 2 is exactly after shot 1 * because the address of shot 2 is exactly after shot 1
*/ */
if (!fa_is_flag_set(fa, FMC_ADC_SVEC) && fa->n_shots == 1) sconfig.src_addr = fa_ddr_offset(fa, i);
sconfig.src_addr = zfad_dev_mem_offset(cset);
else
sconfig.src_addr = i * data_offset;
err = dmaengine_slave_config(fa->dchan, &sconfig); err = dmaengine_slave_config(fa->dchan, &sconfig);
if (err) if (err)
goto err_config; goto err_config;
......
...@@ -19,8 +19,18 @@ enum fa_svec_dev_offsets { ...@@ -19,8 +19,18 @@ enum fa_svec_dev_offsets {
FA_SVEC_ADC2_MEM_END = 0x000005FFF, FA_SVEC_ADC2_MEM_END = 0x000005FFF,
}; };
static struct fmc_adc_platform_data fmc_adc_pdata = { static struct fmc_adc_platform_data fmc_adc_pdata1 = {
.flags = FMC_ADC_BIG_ENDIAN | FMC_ADC_SVEC, .flags = FMC_ADC_BIG_ENDIAN | FMC_ADC_SVEC,
.vme_ddr_offset = 0x1000,
.calib_trig_time = 0,
.calib_trig_threshold = 0,
.calib_trig_internal = 0,
};
static struct fmc_adc_platform_data fmc_adc_pdata2 = {
.flags = FMC_ADC_BIG_ENDIAN | FMC_ADC_SVEC,
.vme_ddr_offset = 0x2000,
.calib_trig_time = 0, .calib_trig_time = 0,
.calib_trig_threshold = 0, .calib_trig_threshold = 0,
.calib_trig_internal = 0, .calib_trig_internal = 0,
...@@ -74,8 +84,8 @@ static struct resource fa_svec_res2[] = { ...@@ -74,8 +84,8 @@ static struct resource fa_svec_res2[] = {
#define MFD_ADC(_n) \ #define MFD_ADC(_n) \
{ \ { \
.name = "fmc-adc-100m", \ .name = "fmc-adc-100m", \
.platform_data = &fmc_adc_pdata, \ .platform_data = &fmc_adc_pdata##_n, \
.pdata_size = sizeof(fmc_adc_pdata), \ .pdata_size = sizeof(fmc_adc_pdata##_n), \
.num_resources = ARRAY_SIZE(fa_svec_res##_n), \ .num_resources = ARRAY_SIZE(fa_svec_res##_n), \
.resources = fa_svec_res##_n, \ .resources = fa_svec_res##_n, \
} }
......
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
struct fmc_adc_platform_data { struct fmc_adc_platform_data {
unsigned long flags; unsigned long flags;
unsigned long vme_ddr_offset;
uint8_t calib_trig_time; uint8_t calib_trig_time;
uint8_t calib_trig_threshold; uint8_t calib_trig_threshold;
uint8_t calib_trig_internal; uint8_t calib_trig_internal;
......
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