Commit c39c3583 authored by Tristan Gingold's avatar Tristan Gingold

driver: cleanup and use svec dma

parent a4fadf58
......@@ -143,43 +143,10 @@ int fa_trigger_software(struct fa_dev *fa)
if (err)
return err;
fa_writel(fa, fa->fa_adc_csr_base, &zfad_regs[ZFAT_SW], 1);
dev_dbg(fa->msgdev, "sw trig (done)\n");
return 0;
}
/**
* Description:
* The version from the Linux kernel automatically squash contiguous pages.
* Sometimes we do not want to squash (e.g. SVEC)
*/
static int sg_alloc_table_from_pages_no_squash(struct sg_table *sgt,
struct page **pages,
unsigned int n_pages,
unsigned int offset,
unsigned long size,
unsigned int max_segment,
gfp_t gfp_mask)
{
struct scatterlist *sg;
int err, i;
err = sg_alloc_table(sgt, n_pages, GFP_KERNEL);
if (unlikely(err))
return err;
for_each_sg(sgt->sgl, sg, sgt->orig_nents, i) {
unsigned long chunk_size;
chunk_size = PAGE_SIZE - offset;
sg_set_page(sg, pages[i], min_t(unsigned long, size, chunk_size), offset);
offset = 0;
size -= chunk_size;
}
return 0;
}
/*
* zfad_convert_hw_range
* @usr_val: range value
......@@ -645,19 +612,8 @@ static void fa_memops_detect(struct fa_dev *fa)
}
}
static void fa_sg_alloc_table_init(struct fa_dev *fa)
{
if (fa_is_flag_set(fa, FMC_ADC_NOSQUASH_SCATTERLIST) && 0)
fa->sg_alloc_table_from_pages = sg_alloc_table_from_pages_no_squash;
else
fa->sg_alloc_table_from_pages = __sg_alloc_table_from_pages;
}
static struct fmc_adc_platform_data fmc_adc_pdata_default = {
.flags = 0,
.vme_reg_offset = 0,
.vme_dma_offset = 0,
.calib_trig_time = 0,
.calib_trig_threshold = 0,
.calib_trig_internal = 0,
......@@ -689,7 +645,6 @@ int fa_probe(struct platform_device *pdev)
}
fa_memops_detect(fa);
fa_sg_alloc_table_init(fa);
r = platform_get_resource(pdev, IORESOURCE_MEM, ADC_MEM_BASE);
fa->fa_top_level = ioremap(r->start, resource_size(r));
......
......@@ -211,12 +211,12 @@ static int zfad_dma_prep_slave_sg(struct dma_chan *dchan,
dev_dbg(&fa->pdev->dev, "DMA max segment %ld\n",
max_segment_size);
max_segment_size &= PAGE_MASK; /* to make alloc_table happy */
err = fa->sg_alloc_table_from_pages(&zfad_block->sgt, pages,
nr_pages,
offset_in_page(zfad_block->block->data),
zfad_block->block->datalen,
max_segment_size,
GFP_KERNEL);
err = __sg_alloc_table_from_pages(&zfad_block->sgt, pages,
nr_pages,
offset_in_page(zfad_block->block->data),
zfad_block->block->datalen,
max_segment_size,
GFP_KERNEL);
if (unlikely(err))
goto err_sgt;
......
......@@ -16,17 +16,6 @@
#define SVEC_FMC_SLOTS 2
/*
* From SVEC but we do not want to add a dependency for these 4 registers
* which should never change by design. If they do, and you end up here:
* sorry! It shouldn't have happened.
*/
#define SVEC_BASE_REGS_CSR 0x40UL
#define SVEC_FPGA_CSR_DDR4_ADDR (SVEC_BASE_REGS_CSR + 0x18)
#define SVEC_FPGA_DDR4_DMA (0x2000)
#define SVEC_FPGA_CSR_DDR5_ADDR (SVEC_BASE_REGS_CSR + 0x1C)
#define SVEC_FPGA_DDR5_DMA (0x3000)
enum fa_svec_dev_offsets {
FA_SVEC_ADC1_MEM_START = 0x00002000,
FA_SVEC_ADC1_MEM_END = 0x00003FFF,
......@@ -56,20 +45,12 @@ static inline struct platform_device *platform_device_register_resndata_mask(
static struct fmc_adc_platform_data fa_svec_adc_pdata[] = {
{
.flags = FMC_ADC_BIG_ENDIAN |
FMC_ADC_SVEC |
FMC_ADC_NOSQUASH_SCATTERLIST,
.vme_reg_offset = SVEC_FPGA_CSR_DDR4_ADDR,
.vme_dma_offset = SVEC_FPGA_DDR4_DMA,
.flags = FMC_ADC_BIG_ENDIAN,
.calib_trig_time = 0,
.calib_trig_threshold = 0,
.calib_trig_internal = 0,
}, {
.flags = FMC_ADC_BIG_ENDIAN |
FMC_ADC_SVEC |
FMC_ADC_NOSQUASH_SCATTERLIST,
.vme_reg_offset = SVEC_FPGA_CSR_DDR5_ADDR,
.vme_dma_offset = SVEC_FPGA_DDR5_DMA,
.flags = FMC_ADC_BIG_ENDIAN,
.calib_trig_time = 0,
.calib_trig_threshold = 0,
.calib_trig_internal = 0,
......
......@@ -339,15 +339,6 @@ struct fa_dev {
struct dentry *dbg_reg_spi;
struct dentry *dbg_trg_sw;
struct dentry *dbg_data_pattern;
/* Operations */
int (*sg_alloc_table_from_pages)(struct sg_table *sgt,
struct page **pages,
unsigned int n_pages,
unsigned int offset,
unsigned long size,
unsigned int max_segment,
gfp_t gfp_mask);
};
/*
......
......@@ -8,20 +8,9 @@
#define __FMC_ADC_PDATA_H__
#define FMC_ADC_BIG_ENDIAN BIT(0)
#define FMC_ADC_NOSQUASH_SCATTERLIST BIT(1)
/*
* In principle this should not be necessary. The two variants should
* be as close as possible to each other. But this is not the case, the DMA
* interface is different and we need to distinguish between SPEC and SVEC.
* NOTE any other carrier is not supported!
*/
#define FMC_ADC_SVEC BIT(3)
#define FMC_ADC_DMA_LITTLE_ENDIAN BIT(4)
struct fmc_adc_platform_data {
unsigned long flags;
unsigned long vme_reg_offset;
unsigned long vme_dma_offset;
unsigned flags;
uint8_t calib_trig_time;
uint8_t calib_trig_threshold;
uint8_t calib_trig_internal;
......
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