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FMC ADC 100M 14b 4cha
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FMC ADC 100M 14b 4cha
Commits
5c6c0ed7
Commit
5c6c0ed7
authored
Jan 07, 2014
by
Matthieu Cattin
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hdl: Change trigger position register to byte-address (was sample-address).
parent
ddf254ee
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fmc_adc_100Ms_core.vhd
hdl/adc/rtl/fmc_adc_100Ms_core.vhd
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hdl/adc/rtl/fmc_adc_100Ms_core.vhd
View file @
5c6c0ed7
...
...
@@ -1460,7 +1460,7 @@ begin
end
process
p_ram_addr_cnt
;
------------------------------------------------------------------------------
-- Store trigger DDR address
-- Store trigger DDR address
(byte address)
------------------------------------------------------------------------------
p_trig_addr
:
process
(
wb_ddr_clk_i
,
sys_rst_n_i
)
begin
...
...
@@ -1468,7 +1468,7 @@ begin
trig_addr
<=
(
others
=>
'0'
);
elsif
rising_edge
(
wb_ddr_clk_i
)
then
if
wb_ddr_fifo_dout
(
64
)
=
'1'
and
wb_ddr_fifo_valid
=
'1'
then
trig_addr
<=
"0000
000"
&
std_logic_vector
(
ram_addr_cnt
)
;
trig_addr
<=
"0000
"
&
std_logic_vector
(
ram_addr_cnt
)
&
"000"
;
end
if
;
end
if
;
end
process
p_trig_addr
;
...
...
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