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FMC ADC 100M 14b 4cha
Commit 2f6f18d7 authored by Federico Vaga's avatar Federico Vaga
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Merge branch 'release/v5.0.4'

parents 1cd9ac07 da50d0a1
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Showing with 40 additions and 11 deletions
CHANGELOG.rst
View file @ 2f6f18d7
...@@ -6,17 +6,27 @@ ...@@ -6,17 +6,27 @@
Changelog Changelog
========= =========
5.0.4 - 2021-07-09
==================
Fixed
-----
- sw: fix endianess only when required
- sw: ADC chip reset is BIT(7)
5.0.3 - 2021-07-05 5.0.3 - 2021-07-05
================== ==================
Added: Added:
----- -----
- bld: CI support - bld: CI support
Changed
-------
- sw: use YAML for fau-calibration
Fixed Fixed
----- -----
- doc: add offset units - doc: add offset units
- sw: calibration value at boot time incorrect - sw: calibration value at boot time incorrect
- sw: use YAML for fau-calibration
5.0.2 - 2021-07-03 5.0.2 - 2021-07-03
================== ==================
...@@ -35,7 +45,7 @@ Fixed ...@@ -35,7 +45,7 @@ Fixed
5.0.0 - 2021-02-11 5.0.0 - 2021-02-11
================== ==================
Changes Changed
------- -------
- channel sysfs attribute 'chx-offset' does not accept mV (milli-volts) values - channel sysfs attribute 'chx-offset' does not accept mV (milli-volts) values
anymore. Now the unit is uV (micro-Volts) anymore. Now the unit is uV (micro-Volts)
......
software/kernel/fa-core.c
View file @ 2f6f18d7
...@@ -282,7 +282,7 @@ int fa_fsm_wait_state(struct fa_dev *fa, ...@@ -282,7 +282,7 @@ int fa_fsm_wait_state(struct fa_dev *fa,
return -ETIMEDOUT; return -ETIMEDOUT;
} }
return 0; return 0;
} }
static void fa_fpga_data_pattern_set(struct fa_dev *fa, unsigned int enable) static void fa_fpga_data_pattern_set(struct fa_dev *fa, unsigned int enable)
...@@ -738,8 +738,10 @@ int fa_probe(struct platform_device *pdev) ...@@ -738,8 +738,10 @@ int fa_probe(struct platform_device *pdev)
fa_clock_enable(fa); fa_clock_enable(fa);
err = fa_adc_wait_serdes_ready(fa, msecs_to_jiffies(10)); err = fa_adc_wait_serdes_ready(fa, msecs_to_jiffies(10));
if (err) if (err) {
dev_err(&fa->pdev->dev, "The SERDES did not syncronize\n");
goto out_serdes; goto out_serdes;
}
/* init all subsystems */ /* init all subsystems */
for (i = 0, m = mods; i < ARRAY_SIZE(mods); i++, m++) { for (i = 0, m = mods; i < ARRAY_SIZE(mods); i++, m++) {
......
software/kernel/fa-dma.c
View file @ 2f6f18d7
...@@ -320,11 +320,12 @@ static int zfad_dma_block_to_pages(struct page **pages, unsigned int nr_pages, ...@@ -320,11 +320,12 @@ static int zfad_dma_block_to_pages(struct page **pages, unsigned int nr_pages,
static void zfad_dma_context_exit_svec(struct zio_cset *cset, static void zfad_dma_context_exit_svec(struct zio_cset *cset,
struct zfad_block *zfad_block) struct zfad_block *zfad_block)
{ {
struct fa_dev *fa = cset->zdev->priv_d;
__endianness(zfad_block->block->datalen,
zfad_block->block->data);
kfree(zfad_block->dma_ctx); kfree(zfad_block->dma_ctx);
if (fa_is_flag_set(fa, FMC_ADC_DATA_NO_SWAP))
return;
__endianness(zfad_block->block->datalen, zfad_block->block->data);
} }
static void zfad_dma_context_exit(struct zio_cset *cset, static void zfad_dma_context_exit(struct zio_cset *cset,
......
software/kernel/fa-regtable.c
View file @ 2f6f18d7
...@@ -24,6 +24,7 @@ const struct zfa_field_desc zfad_regs[] = { ...@@ -24,6 +24,7 @@ const struct zfa_field_desc zfad_regs[] = {
[ZFA_STA_FSM] = {ADC_CSR_STA_REG_OFFSET, 0x00000007, 1}, [ZFA_STA_FSM] = {ADC_CSR_STA_REG_OFFSET, 0x00000007, 1},
[ZFA_STA_SERDES_PLL] = {ADC_CSR_STA_REG_OFFSET, 0x00000008, 1}, [ZFA_STA_SERDES_PLL] = {ADC_CSR_STA_REG_OFFSET, 0x00000008, 1},
[ZFA_STA_SERDES_SYNCED] = {ADC_CSR_STA_REG_OFFSET, 0x00000010, 1}, [ZFA_STA_SERDES_SYNCED] = {ADC_CSR_STA_REG_OFFSET, 0x00000010, 1},
[ZFA_STA_ACQ_CFG] = {ADC_CSR_STA_REG_OFFSET, 0x00000020, 1},
[ZFA_STA_FMC_NR] = {ADC_CSR_STA_REG_OFFSET, 0x000000c0, 1}, [ZFA_STA_FMC_NR] = {ADC_CSR_STA_REG_OFFSET, 0x000000c0, 1},
[ZFA_STA_CALIB_BUSY] = {ADC_CSR_STA_REG_OFFSET, 0x00008000, 1}, [ZFA_STA_CALIB_BUSY] = {ADC_CSR_STA_REG_OFFSET, 0x00008000, 1},
/* Trigger */ /* Trigger */
......
software/kernel/fa-zio-trg.c
View file @ 2f6f18d7
...@@ -317,6 +317,11 @@ static int zfat_data_done(struct zio_cset *cset) ...@@ -317,6 +317,11 @@ static int zfat_data_done(struct zio_cset *cset)
return 0; return 0;
} }
static bool fa_adc_is_acquisition_valid(struct fa_dev *fa)
{
return fa_readl(fa, fa->fa_adc_csr_base, &zfad_regs[ZFA_STA_ACQ_CFG]);
}
/* /*
* zfat_arm_trigger * zfat_arm_trigger
* @ti: trigger instance * @ti: trigger instance
...@@ -335,6 +340,10 @@ static int zfat_arm_trigger(struct zio_ti *ti) ...@@ -335,6 +340,10 @@ static int zfat_arm_trigger(struct zio_ti *ti)
int i, err = 0; int i, err = 0;
dev_dbg(fa->msgdev, "Arming trigger\n"); dev_dbg(fa->msgdev, "Arming trigger\n");
if (!fa_adc_is_acquisition_valid(fa)) {
dev_err(fa->msgdev, "Hardware detected invalid ADC acquistion\n");
return -EINVAL;
}
/* Update the current control: sequence, nsamples and tstamp */ /* Update the current control: sequence, nsamples and tstamp */
interleave->current_ctrl->nsamples = ti->nsamples; interleave->current_ctrl->nsamples = ti->nsamples;
...@@ -374,7 +383,7 @@ static int zfat_arm_trigger(struct zio_ti *ti) ...@@ -374,7 +383,7 @@ static int zfat_arm_trigger(struct zio_ti *ti)
if (size % 4) { if (size % 4) {
/* should never happen: increase the size accordling */ /* should never happen: increase the size accordling */
dev_warn(fa->msgdev, dev_warn(fa->msgdev,
"\nzio data block size should 32bit word aligned." "zio data block size should 32bit word aligned."
"original size:%d was increased by %d bytes\n", "original size:%d was increased by %d bytes\n",
size, size%4); size, size%4);
size += size % 4; size += size % 4;
...@@ -389,7 +398,10 @@ static int zfat_arm_trigger(struct zio_ti *ti) ...@@ -389,7 +398,10 @@ static int zfat_arm_trigger(struct zio_ti *ti)
GFP_ATOMIC); GFP_ATOMIC);
if (!block) { if (!block) {
dev_err(fa->msgdev, dev_err(fa->msgdev,
"\narm trigger fail, cannot allocate block\n"); "arm trigger fail, cannot allocate block (%d/%d size: %d (%d + %d))\n",
i, fa->n_shots, size,
interleave->current_ctrl->ssize * ti->nsamples,
FA_TRIG_TIMETAG_BYTES);
err = -ENOMEM; err = -ENOMEM;
goto out_allocate; goto out_allocate;
} }
......
software/kernel/fmc-adc-100m14b4cha-private.h
View file @ 2f6f18d7
...@@ -91,6 +91,7 @@ enum zfadc_dregs_enum { ...@@ -91,6 +91,7 @@ enum zfadc_dregs_enum {
ZFA_STA_FSM, ZFA_STA_FSM,
ZFA_STA_SERDES_PLL, ZFA_STA_SERDES_PLL,
ZFA_STA_SERDES_SYNCED, ZFA_STA_SERDES_SYNCED,
ZFA_STA_ACQ_CFG,
ZFA_STA_FMC_NR, ZFA_STA_FMC_NR,
ZFA_STA_CALIB_BUSY, ZFA_STA_CALIB_BUSY,
/* Configuration register */ /* Configuration register */
......
software/kernel/platform_data/fmc-adc-100m14b4cha.h
View file @ 2f6f18d7
...@@ -9,6 +9,8 @@ ...@@ -9,6 +9,8 @@
#define FMC_ADC_BIG_ENDIAN BIT(0) #define FMC_ADC_BIG_ENDIAN BIT(0)
#define FMC_ADC_NOSQUASH_SCATTERLIST BIT(1) #define FMC_ADC_NOSQUASH_SCATTERLIST BIT(1)
#define FMC_ADC_DATA_NO_SWAP BIT(2)
/* /*
* In principle this should not be necessary. The two variants should * In principle this should not be necessary. The two variants should
* be as close as possible to each other. But this is not the case, the DMA * be as close as possible to each other. But this is not the case, the DMA
......
software/kernel/spi.c
View file @ 2f6f18d7
...@@ -76,11 +76,11 @@ int fa_spi_init(struct fa_dev *fa) ...@@ -76,11 +76,11 @@ int fa_spi_init(struct fa_dev *fa)
fa_iowrite(fa, 100, fa->fa_spi_base + FA_SPI_DIV); fa_iowrite(fa, 100, fa->fa_spi_base + FA_SPI_DIV);
/* software reset the ADC chip (register 0) */ /* software reset the ADC chip (register 0) */
fa_spi_xfer(fa, FA_SPI_SS_ADC, 16, BIT(8), &rx); fa_spi_xfer(fa, FA_SPI_SS_ADC, 16, BIT(7), &rx);
msleep(5); msleep(5);
/* Force 2's complement data output (register 1, bit 5) */ /* Force 2's complement data output (register 1, bit 5) */
fa_spi_xfer(fa, FA_SPI_SS_ADC, 16, (1 << 8) | (1 << 5), &rx); fa_spi_xfer(fa, FA_SPI_SS_ADC, 16, BIT(8) | BIT(5), &rx);
return 0; return 0;
} }
......
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