• Federico Vaga's avatar
    sw:drv: fix VME DMA concurrent transfers · 9e1dadfd
    Federico Vaga authored
    On SVEC we can have up to two FMC-ADC-100M mezzanine, potentially
    triggering at the same time. If such conditions, the driver fails in
    performing the DMA on both mezzanine because one of the two will fail to
    request a channel.
    
    With this patch we introducte a 10s timeout for the ADC to request a DMA
    channel on SVEC.
    Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
    9e1dadfd
fa-dma.c 23.5 KB