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FMC ADC 100M 14b 4cha - Gateware
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FMC ADC 100M 14b 4cha - Gateware
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18
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21
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gateware manual: wrong data format reported for channel status registers
#9
· opened
Nov 09, 2017
by
Dimitris Lampridis
V5.0 gateware release
bug
CLOSED
2
updated
Aug 05, 2019
Update testbench
#7
· opened
Jan 23, 2018
by
Dimitris Lampridis
V5.0 gateware release
feature
CLOSED
1
updated
Aug 05, 2019
Misalignment of external trigger wrt data
#4
· opened
Jan 26, 2018
by
Dimitris Lampridis
V5.0 gateware release
bug
CLOSED
1
updated
Aug 05, 2019
Replace hardware trigger enable logic
#8
· opened
Jan 23, 2018
by
Dimitris Lampridis
V5.0 gateware release
feature
CLOSED
1
updated
Aug 05, 2019
Add correct delays to all trigger sources
#3
· opened
Jan 26, 2018
by
Dimitris Lampridis
V5.0 gateware release
bug
CLOSED
1
updated
Aug 05, 2019
Add White Rabbit support
#26
· opened
Apr 18, 2016
by
Dimitris Lampridis
V5.0 gateware release
feature
CLOSED
2
updated
Aug 05, 2019
Add "trigger on time" functionality
#15
· opened
Apr 28, 2016
by
Dimitris Lampridis
V5.0 gateware release
feature
CLOSED
1
updated
Aug 05, 2019
Wrong sampling clock freqency in the Xilinx constraints
#2
· opened
Jan 31, 2018
by
Dimitris Lampridis
V5.0 gateware release
bug
CLOSED
2
updated
Aug 05, 2019
Update Gennum core to address critical freeze issue
#5
· opened
Jan 25, 2018
by
Dimitris Lampridis
V5.0 gateware release
bug
CLOSED
1
updated
Aug 05, 2019
hdl - switch to 125MHz clock source
#10
· opened
May 13, 2016
by
Dimitris Lampridis
V5.0 gateware release
feature
CLOSED
0
updated
Aug 05, 2019
hdl - Replace glitch filter with dual threshold FSM
#31
· opened
Feb 08, 2016
by
Dimitris Lampridis
V5.0 gateware release
feature
CLOSED
1
updated
Aug 05, 2019
hdl - Trim unused clock signals
#29
· opened
Feb 08, 2016
by
Dimitris Lampridis
V5.0 gateware release
bug
CLOSED
1
updated
Aug 05, 2019
hdl - Review and sanitize reset logic
#30
· opened
Feb 08, 2016
by
Dimitris Lampridis
V5.0 gateware release
bug
CLOSED
1
updated
Aug 05, 2019
Replace "decimation" with "under-sampling"
#25
· opened
Apr 18, 2016
by
Dimitris Lampridis
V5.0 gateware release
feature
CLOSED
1
updated
Aug 05, 2019
doc - fix formula for calculating the corrected DAC value
#1
· opened
Sep 25, 2018
by
Dimitris Lampridis
V5.0 gateware release
bug
CLOSED
1
updated
Aug 05, 2019
Implement a basic WR trigger message
#12
· opened
Apr 28, 2016
by
Dimitris Lampridis
V5.0 gateware release
feature
CLOSED
1
updated
Aug 05, 2019
Add extra trigger input from FPGA logic
#13
· opened
Apr 28, 2016
by
Dimitris Lampridis
V5.0 gateware release
feature
CLOSED
1
updated
Aug 05, 2019
Add option to tag based on WR time
#14
· opened
Apr 28, 2016
by
Dimitris Lampridis
V5.0 gateware release
feature
CLOSED
1
updated
Aug 05, 2019