Explore projects
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Project holding Data centre environmental sensor projects. E.g. measuring humidity, dust, temperature etc.
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Projects that fit in 19 inch racks. Also known as pizza-box projects.
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Projects around SFP modules (Small-Form-factor Pluggable optical transceivers) are subprojects of this project.
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Software to support the PandABox is common between all platforms using the PandABlocks framework and is developed on Github:
PandABlocks-rootfs: Github repository for building onboard rootfs from source PandABlocks-server: Github repository for onboard TCP server PandABlocks-webserver: Github repository for onboard webserver PandABlocks-client: Github repository for Python client side tools ADPandABlocks: Github repository for EPICS areaDetector driver
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Gateware (HDL design) for PandABox is common between all platforms using the PandABlocks framework and is developed on Github:
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PC/104 modules. PC/104 (or PC104) is a family of embedded computer standards which define both form factors and computer buses. The standard is modular, and allows to stack together boards from a variety of COTS manufacturers to produce a customized embedded system. The designs are in sub-projects.
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VME projects are sub-projects of this ohwr project. See all sub-projects for more information.
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This is a port of an older Linux ptpd to support White Rabbit extensions and run both in hosted and freestanding environment. In the future we plan to replace it with PPSI, which has a much better design, but ptp-noposix is currently working pretty well despite being difficult to maintain.
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Projects / ARRAY / ARRAY - Python Interface
MIT LicenseA system to characterise large area silicon pad sensors with several hundred channels. It consists of two PCBs. One is an active switching 512-to-1 matrix. The second one is a passive probe card to contact the sensor. Software.
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This library provides a generic API for ADC devices, so that applications can use this API to access any of the supported ADC boards. Currently the library supports the following boards:
fmc-adc-100m14b14chaFor testing and debugging purpose it supports also a couple of virtual boards that you can use to start the development of your application.
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The DAPHNE front end board is a piece of hardware that digitizes the output signal from one of the systems of the far detector in the DUNE experiment. For more information, see the wiki
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FPGA Firmware ( "Gateware" ) for AIDA-2020 TLU and AIDA mini-TLU
Uses "IPBus Build" ( ipbb )
Build instructions at Instructions here
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The uRV (Micro RISC-V) core is a small-sized implementation of a 32-bit RISC-V core, targeted specifically at FPGAs. More info at the Wiki page
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A software framework for Linux device drivers aimed at supporting controls and data acquisition hardware. ZIO supports sub-nanosecond timestamps, block-oriented input and output and transport of meta-data with the data samples. Users can change the buffer type and trigger type associated with a device at run time, and all of devices, triggers and buffers are easily implemented as add-on modules.
The PF_ZIO implementation, currently in beta status, implements a network interface to the ZIO transport, which allows each I/O channel to generate or receive network frames. Applications see the network of devices and can talk with several of them from the same socket. We support SOCK_STREAM, SOCK_DGRAM and SOCK_RAW.
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Projects / AIDA-2020 TLU - Hardware
CERN Open Hardware Licence v1.2Updated