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AIDA-2020 TLU - Gateware

Building aida 2020 tlu firmware

Last edited by David Cussans
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Building AIDA-2020 TLU firmware

These instructions assume that the FPGA carrier board being used is an Enclustra AX3 mounted on a PM3 carrier.

Prerequisites:

  • Xilinx Vivado ( 2016.4 , 2017.4 , 2018.1 , 2018.2 , 2018.3, 2019.2 tested )
  • Linux installation ( tested on CentOS 7 )
    • Including Python 2.7 and python-virtualenv ( needed for ipbb )

To build firmware:

  • Set up Xilinx Vivado environment (version 2019.2 recommended)

  • Download build script:

 wget https://ohwr.org/project/fmc-mtlu-gw/raw/1e000026/AIDA_tlu/scripts/build_tlu_firmware.sh?inline=false -O build_tlu_firmware.sh

(replace 1e000026 with the tag you want to build , or master if you want to build the master branch )

  • Execute build script:
 sh ./build_tlu_firmware.sh
  • The result should be a Gzipped Tar archive ( .tgz file ) containing the bit FPGA configuration file (*.bit) and a copy of the IPBus XML address table