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The Analogue GIRAPH is an active 19" patch panel that provides 32 single ended or 16 diff. analogue inputs and 8 channels single-ended analogue output.
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A meta project used to discuss and present information about Open Hardware and related subjects. More info at the Wiki page More info about the CERN Open Hardware licence More info about the OHR.org site support
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Projects / Hdlmake
GNU General Public License v3.0 onlyTool for generating multi-purpose makefiles for FPGA projects.
Main features:
makefile generation for: fetching modules from repositories simulating HDL projects synthesizing HDL projects synthesizing projects remotely (keeping your local resources free) generating multi-vendor project files (no clicking in the IDE!) many other things without involving make and makefilesHdlmake supports modularity, scalability, revision control systems. Hdlmake can be run on any Linux or Windows machine with any HDL More info at the Wiki page
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This project contains all the HDL gateware necessary for the FPGA of the WR switch.
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A Trigger/Timing Logic Unit to synchronize devices at beam test A successor to the AIDA(2020) TLU (https://ohwr.org/project/fmc-mtlu) This is an "umbrella" project with documentation, pointing to the projects with the hardware and firm(gate)ware
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DIOT reliability studies files and reports. More info at the Wiki page
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White Rabbit is a fully deterministic Ethernet-based network for general purpose data transfer and synchronization. It can synchronize over 1000 nodes with sub-ns accuracy over fiber lengths of up to 10 km. Commercially available. More info at the Wiki page
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Programmable attenuator of RF signals with very high voltage range (50mV – 1000 V) for protecting digitizers against damage by high voltage signals. Four channels with SMA connectors; Three attenuation values: 0, -20, -40 dB; Bandwidth: DC – 2 GHz.
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YAM is a micro-controller core aiming at simple yet fast IO sequencing with integer processing capabilities. YAM parameters may be assigned to fit many applications. The data width is scalable from 8 to any value (like 32 or larger) size.
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Control of instrumentation over a White Rabbit network. Define and implement a standardized communication protocol for instrumentation over a White Rabbit network (precise synchronization and timestamping; remote control and test sequence programming; message exchanging and event distribution).
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A project to host all software and hardware developments related to testing the White Rabbit switch.
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This project covers the hardware development of the White Rabbit switch.
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This project covers all efforts geared to standardize White Rabbit, with a view to providing a stable specification which everyone can use to build compliant products.
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This project guides new users to start in the White Rabbit “World” with simple experiments. The starting kit uses two SPEC + FMC-DIO cards. Each node allows basic operations such as input timestamping or programmable output pulse generation. Additionally, specific software and gateware layers allow to use it as a standard network interface card implementing the White Rabbit technology functionalities.
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The aim of the board is to improve the performance of the WR Switch using an external PLL and a new VCTCXO. More info at the Wiki page
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White Rabbit Switch WRS-3/18 (hardware version 3.4) with modified SCB prepared for the low-jitter daughterboard and modified backplane. Commercially available. More info at the Wiki page
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Fanless version of the White Rabbit Switch WRS-3/18 (hardware version 3.4) with the low-jitter daughterboard integrated. More info at the Wiki page
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Project exploring the current limits of White Rabbit timing distribution and how to obtain the best possible jitter and Allan Deviation performance
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