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Software for White Rabbit PTP Core
Commit 4a549f5c authored by Tomasz Wlostowski's avatar Tomasz Wlostowski
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wip

parent 496615c6
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Showing with 272 additions and 154 deletions
boards/afcz/board.c
View file @ 4a549f5c
......@@ -413,6 +413,8 @@ static void wr_si57x_interface_init( struct wr_si57x_interface_device *dev, uint
}
// fixme: factor out all this code to a common file (used by sis83k, afcz, ertm)
static int calc_apr(int meas_min, int meas_max, int f_center )
{
// apr_min is in PPM
......@@ -442,37 +444,54 @@ static int calc_apr(int meas_min, int meas_max, int f_center )
return ppm_lo < ppm_hi ? ppm_lo : ppm_hi;
}
static void check_vco_freq( int cm_channel, int cm_ref, void (*dac_setter)(int ))
static int gen_rnd( )
{
int f_min, f_max;
int tune_min = 0;
static const uint32_t lcg_m = 1103515245;
static const uint32_t lcg_i = 12345;
static uint32_t seed = 0;
seed *= lcg_m;
seed += lcg_i;
seed &= 0x7fffffffUL;
return seed;
}
static int measure_vcxo_freq( int cm_channel, int cm_ref, int gate_freq, int n_steps, uint32_t expected_freq, void (*dac_setter)(int), int *apr, uint32_t *base_freq )
{
int f_min = 0, f_max = 0;
int tune_min = 3000;
int tune_max = 65535;
int tune_step = 5000;
int tune_step = 1; //(tune_max-tune_min) / n_steps;
wb_cm_configure( &board.clk_mon, cm_ref, 5, 1000000 );
wb_cm_configure( &board.clk_mon, cm_ref, 5, gate_freq );
wb_cm_set_ref_frequency( &board.clk_mon, CPU_CLOCK );
int tune = tune_min;
for(;;)
{
dac_setter( tune );
timer_delay_ms(1);
dac_setter( tune + (gen_rnd() % 3000) - 1500);
timer_delay_ms(5);
wb_cm_restart( &board.clk_mon );
while( ! (wb_cm_read( &board.clk_mon ) & ( 1<< cm_channel) ) );
while( ! (wb_cm_read( &board.clk_mon ) & ( 1<< cm_channel) ) )
{
dac_setter( tune + (gen_rnd() % 3000) - 1500);
timer_delay_ms(5);
}
int f = board.clk_mon.freqs[ cm_channel ];
if( tune == tune_min )
f_min = f;
else if ( tune == tune_max )
f_max = f;
if(tune == tune_max)
break;
pp_printf("Tune: %d f = %d Hz (deltaF = %d Hz)\n", tune, f, f - 62500000 );
board_dbg("Tune: %d f = %d Hz (deltaF = %d Hz)\n", tune, f, f - expected_freq );
tune += tune_step;
if( tune > tune_max )
......@@ -482,10 +501,21 @@ static void check_vco_freq( int cm_channel, int cm_ref, void (*dac_setter)(int )
dac_setter( 32768 );
timer_delay(1);
pp_printf("VCO ch %d: Low=%d Hz Hi=%d Hz, APR = %d ppm.\n", cm_channel, f_min, f_max, calc_apr(f_min, f_max, 62500000) );
int l_apr = calc_apr(f_min, f_max, 62500000);
if( apr )
*apr = l_apr;
if( base_freq )
*base_freq = (f_min + f_max) / 2;
board_dbg("VCO ch %d: Low=%d Hz Hi=%d Hz, APR = %d ppm.\n", cm_channel, f_min, f_max, l_apr );
return 0;
}
static void set_dmtd_dac( int value )
{
spll_set_dac( -1, value );
......@@ -493,9 +523,24 @@ static void set_dmtd_dac( int value )
static void set_main_dac( int value )
{
//pp_printf("smaind %d\n", value );
spll_set_dac( 0, value );
}
int afcz_check_clocks()
{
//check_vco_freq( AFCZ_CM_CHANNEL_CLK_DMTD, AFCZ_CM_CHANNEL_CLK_RX, set_dmtd_dac );
//check_vco_freq( AFCZ_CM_CHANNEL_CLK_REF, AFCZ_CM_CHANNEL_CLK_RX, set_main_dac );
board_dbg("Check REF VCXO (Si570)\n");
measure_vcxo_freq( AFCZ_CM_CHANNEL_CLK_REF, AFCZ_CM_CHANNEL_CLK_RX, 10000000, 10, 62500000, set_main_dac, NULL, NULL );
board_dbg("Check DMTD VCXO\n");
measure_vcxo_freq( AFCZ_CM_CHANNEL_CLK_DMTD, AFCZ_CM_CHANNEL_CLK_RX, 100000, 10, 62500000, set_dmtd_dac, NULL, NULL );
return 0;
}
const struct gpio_pin pin_rtm_4sfp_led_orange = { &board.gpio_rtm_main.gpio, 3 };
const struct gpio_pin pin_rtm_4sfp_i2c_reset_n = { &board.gpio_rtm_main.gpio, 5 };
const struct gpio_pin pin_rtm_4sfp_i2c_enable_n = { &board.gpio_rtm_main.gpio, 6 };
......@@ -629,6 +674,8 @@ int wrc_board_early_init()
idt8v_configure_io ( &board.clk_mux, AFCZ_IC33_FPGA_CLK3_OUT, 0, 0, AFCZ_IC33_CLK_SI570_1_IN);
idt8v_configure_io ( &board.clk_mux, AFCZ_IC33_FPGA_CLK_GTX_CUST2_OUT, 0, 0, AFCZ_IC33_CLK_SI570_1_IN);
idt8v_configure_io ( &board.clk_mux, AFCZ_IC33_FPGA_FMC2_CLK2_BIDIR_OUT, 0, 0, AFCZ_IC33_CLK_SI570_1_IN);
idt8v_configure_io ( &board.clk_mux, 10, 0, 0, AFCZ_IC33_CLK_SI570_1_IN);
idt8v_commit_configuration ( &board.clk_mux );
wb_cm_init( &board.clk_mon, BASE_CLOCK_MONITOR, 6 );
......@@ -675,6 +722,7 @@ int wrc_board_early_init()
#define AFCZ_CLOCK_MON_TIMEOUT_MS 4000
#if 0
int afcz_check_clocks()
{
wb_cm_configure( &board.clk_mon, AFCZ_CM_CHANNEL_CLK_SYS, 5, 10000000 );
......@@ -697,11 +745,11 @@ int afcz_check_clocks()
pp_printf("Checking clocks: RX clock freq = %d Hz\n", board.clk_mon.freqs[ AFCZ_CM_CHANNEL_CLK_RX ]);
pp_printf("Checking DDMTD and REF clock frequencies:\n");
check_vco_freq( AFCZ_CM_CHANNEL_CLK_DMTD, AFCZ_CM_CHANNEL_CLK_RX, set_dmtd_dac );
check_vco_freq( AFCZ_CM_CHANNEL_CLK_REF, AFCZ_CM_CHANNEL_CLK_RX, set_main_dac );
// afcz_check_clocks();
return 0;
}
#endif
int wrc_board_init()
{
......@@ -718,7 +766,7 @@ int wrc_board_init()
&pin_sysc_spi_sclk, 10 );
spi_wrc_flash.rd_falling_edge = 1;
int retries = 100;
int retries = 1000000;
uint32_t id;
flash_entry_points[0] = 0x1f00000;
......
boards/afcz/board.h
View file @ 4a549f5c
......@@ -22,7 +22,7 @@
#define BASE_SOFTPLL 0x20200
#define BASE_PPS_GEN 0x20300
#define BASE_AUXWB 0x20700
#define BASE_AUXWB 0x28000
#define BASE_SI57X_INTERFACE (BASE_AUXWB + 0x80)
#define BASE_CLOCK_MONITOR (BASE_AUXWB + 0xc0)
#define BASE_WR_ENDPOINT_BTRAIN (BASE_AUXWB + 0x00)
......
boards/ertm14/board.c
View file @ 4a549f5c
This diff is collapsed.
boards/ertm14/board.h
View file @ 4a549f5c
......@@ -20,6 +20,7 @@
#include "dev/spi_flash.h"
#include "dev/bb_i2c.h"
#include "dev/iuart.h"
#include "lib/ertm14-uart-link.h"
#include "rf_frame_transceiver.h"
#define BOARD_HAS_CUSTOM_NETWORK_INIT 1
......@@ -146,6 +147,11 @@ extern unsigned char *BASE_EP;
#define WRC_ERTM14_EVENT_APPLY_NEW_CONFIG (WRC_EVENT_PRIVATE_START+0)
#define WRC_ERTM14_EVENT_RECONFIGURED (WRC_EVENT_PRIVATE_START+1)
// UART Protocol packet types
#define ERTM14_UART_PTYPE_PING 1
#define ERTM14_UART_PTYPE_SNMP_REQ 2
#define ERTM14_UART_PTYPE_SNMP_RESP 3
struct ertm14_board
{
struct gpio_device gpio_aux;
......@@ -178,6 +184,7 @@ struct ertm14_board
struct iuart_device iuart_14;
struct wr_rf_frame_transceiver_device rf_xcvr;
struct gpio_device gpio_ertm15_leds;
struct uart_link control_uart;
int mode;
int dds_resync_count;
......
dev/console.c
View file @ 4a549f5c
......@@ -92,7 +92,7 @@ static int con_uart_put_string(struct console_device* dev, const char *s)
if( dev->flags & CONSOLE_FLAGS_MODE_BINARY )
return 0;
while ( c = *s++ )
while ( (c = *s++) != 0 )
{
if( (dev->flags & CONSOLE_FLAGS_INSERT_CRLF) && c == '\n')
suart_write_byte(&priv->uart_dev, '\r');
......@@ -106,8 +106,8 @@ static int con_uart_put_string(struct console_device* dev, const char *s)
static int con_uart_getc(struct console_device* dev)
{
//if( dev->flags & CONSOLE_FLAGS_MODE_BINARY )
//return 0;
if( dev->flags & CONSOLE_FLAGS_MODE_BINARY )
return 0;
return con_rx_internal( dev );
}
......@@ -204,6 +204,7 @@ static inline int rbuf_full(struct ring_buffer *buf)
static inline int rbuf_purge(struct ring_buffer *buf)
{
buf->head = buf->tail = buf->count = 0;
return 0;
}
......@@ -211,7 +212,7 @@ static int con_ipmi_put_string(struct console_device* dev, const char *s)
{
struct console_ipmi_priv_data* priv = (struct console_ipmi_priv_data*) dev->priv;
int c, n = 0;
while( c = *s++ )
while( (c = *s++) != 0 )
{
rbuf_put( &priv->tx_buf, c );
n++;
......@@ -234,7 +235,6 @@ int console_ipmi_process_request(struct console_device* dev, uint8_t *req, int
struct console_ipmi_priv_data* priv = (struct console_ipmi_priv_data*) dev->priv;
int i;
int cnt = priv->tx_buf.count;
for(i = 0; i < size; i++ )
{
......@@ -259,13 +259,13 @@ int console_ipmi_process_request(struct console_device* dev, uint8_t *req, int
return i;
}
void console_ipmi_init( )
void console_ipmi_init( void )
{
console_ipmi_dev.priv = &console_ipmi_priv;
console_ipmi_dev.get_char = con_ipmi_getc;
console_ipmi_dev.put_string = con_ipmi_put_string;
rbuf_init(&console_ipmi_priv.rx_buf, IPMI_CON_RX_BUF_SIZE, &console_ipmi_priv.rx_buf_mem);
rbuf_init(&console_ipmi_priv.tx_buf, IPMI_CON_TX_BUF_SIZE, &console_ipmi_priv.tx_buf_mem);
rbuf_init(&console_ipmi_priv.rx_buf, IPMI_CON_RX_BUF_SIZE, console_ipmi_priv.rx_buf_mem);
rbuf_init(&console_ipmi_priv.tx_buf, IPMI_CON_TX_BUF_SIZE, console_ipmi_priv.tx_buf_mem);
console_register_device( &console_ipmi_dev );
}
......@@ -351,44 +351,37 @@ int console_get_mode( struct console_device *dev )
return dev->flags & ( CONSOLE_FLAGS_MODE_BINARY | CONSOLE_FLAGS_MODE_TTY );
}
int console_binary_send( struct console_device *dev, void *buf, int size )
int console_binary_send_byte( struct console_device *dev, uint8_t b )
{
struct console_uart_priv_data* priv = (struct console_uart_priv_data*) dev->priv;
if( dev->flags & CONSOLE_FLAGS_MODE_TTY )
return 0;
int has_fifo = suart_is_fifo_supported( &priv->uart_dev );
if( !has_fifo )
return -ENODEV;
// fixme: FIFO threshold check?
uint8_t *ptr = (uint8_t*) buf;
int i;
for(i = 0; i< size; i++)
suart_write_byte( &priv->uart_dev, ptr[i] );
suart_write_byte( &priv->uart_dev, b );
return size;
return 0;
}
int console_binary_recv( struct console_device *dev, void *buf, int size )
int console_binary_recv_byte( struct console_device *dev )
{
struct console_uart_priv_data* priv = (struct console_uart_priv_data*) dev->priv;
if( dev->flags & CONSOLE_FLAGS_MODE_TTY )
return -1;
int has_fifo = suart_is_fifo_supported( &priv->uart_dev );
if( !has_fifo )
return -ENODEV;
int rx_count = suart_poll( &priv->uart_dev );
if( rx_count < size )
return -EAGAIN;
uint8_t *ptr = (uint8_t*) buf;
int i;
for(i = 0; i< size; i++)
ptr[i] = suart_read_byte(&priv->uart_dev );
int rx_byte = con_rx_internal( dev );
return size;
return rx_byte;
}
dev/ltc695x.c
View file @ 4a549f5c
......@@ -37,6 +37,8 @@ uint8_t ltc695x_read(struct ltc695x_device *dev, uint32_t reg) {
bb_spi_write( dev->bus, (reg << 1) | 1, 8);
rv = bb_spi_read(dev->bus, 8);
bb_spi_cs(dev->bus, 0);
pp_printf("REad %x %x\n", reg, rv );
return rv;
}
......@@ -56,6 +58,8 @@ int ltc695x_configure(struct ltc695x_device *dev, struct ltc695x_config* cfg)
for(i = 0; i < cfg->n_regs; i++) {
ltc695x_write(dev, cfg->regs[i].addr, cfg->regs[i].value);
}
return 0;
}
#define LTC6953_PD_NORMAL (0)
......@@ -87,7 +91,7 @@ int ltc6953_set_pdown( struct ltc695x_device *dev, int out, int pd )
r &= ~( 0x3 << shift );
r |= pd << shift;
dev_dbg("ltc6953 out %d [addr %x mask %x r %x] PD = %d\n", out, reg, shift, r, pd );
//dev_dbg("ltc6953 out %d [addr %x mask %x r %x] PD = %d\n", out, reg, shift, r, pd );
ltc695x_write(dev, reg, r );
return 0;
......@@ -125,7 +129,6 @@ int ltc6953_configure_output( struct ltc695x_device *dev, int output, int divide
dev_dbg("ltc6953 r%02x = %02x\n", base+0, or0 );
dev_dbg("ltc6953 r%02x = %02x\n", base+1, or1 );
ltc695x_write( dev, base + 0, or0 );
ltc695x_write( dev, base + 1, or1 );
......
dev/minic.c
View file @ 4a549f5c
......@@ -213,6 +213,8 @@ int minic_rx_frame(struct wr_ethhdr *hdr, uint8_t * payload, uint32_t buf_size,
/* Increment Rx counter for statistics */
minic.rx_count++;
pp_printf("RX %d\n", payload_size );
if (minic_readl(MINIC_REG_MCR) & MINIC_MCR_RX_FULL)
pp_printf("Warning: Minic Rx fifo full, expect wrong frames\n");
......
include/dev/console.h
View file @ 4a549f5c
......@@ -21,8 +21,7 @@ struct console_device {
int flags;
};
extern struct console_device *console;
extern struct console_device console_uart_dev;
void console_set_device( struct console_device *dev );
void console_uart_write_bytes( uint8_t *buf, int count );
......@@ -33,8 +32,8 @@ int console_getc(void);
void console_force_mode( struct console_device *dev, int mode );
int console_get_mode( struct console_device *dev );
int console_binary_send( struct console_device *dev, void *buff, int size );
int console_binary_recv( struct console_device *dev, void *buff, int size );
int console_binary_send_byte( struct console_device *dev, uint8_t b );
int console_binary_recv_byte( struct console_device *dev );
#ifdef CONFIG_IPMI_CONSOLE
int console_ipmi_process_request(struct console_device* dev, uint8_t *req, int size, uint8_t *rsp, int rsp_size );
......
lib/lib.mk
View file @ 4a549f5c
......@@ -13,3 +13,4 @@ obj-$(CONFIG_SYSLOG) += lib/syslog.o
obj-$(CONFIG_LATENCY_PROBE) += lib/latency.o
obj-$(CONFIG_SNMP) += lib/snmp.o
obj-$(CONFIG_LLDP) += lib/lldp.o
obj-$(CONFIG_TARGET_ERTM14) += lib/ertm14-uart-link.o
\ No newline at end of file
lib/net.c
View file @ 4a549f5c
......@@ -231,6 +231,8 @@ int ptpd_netif_recvfrom(struct wrpc_socket *s, struct wr_sockaddr *from, void *d
if (!q->n)
return 0;
pp_printf("QNotEmpty\n");
q->n--;
q->avail += wrap_copy_in(&size, q, 2, 0);
......@@ -341,6 +343,8 @@ int net_bh_poll(void)
return 0;
}
pp_printf("F1\n");
/* Prepare for IP/UDP checks */
if (payload[IP_VERSION] == 0x45 && payload[IP_PROTOCOL] == 17)
port = payload[UDP_DPORT] << 8 | payload[UDP_DPORT + 1];
......@@ -351,8 +355,11 @@ int net_bh_poll(void)
s = socks[i];
if (!s)
continue;
pp_printf("check sock %p\n", s);
pp_printf("check e %x %x\n", hdr.ethtype , s->bind_addr.ethertype);
if (hdr.ethtype != s->bind_addr.ethertype)
continue;
if (!port && !s->bind_addr.udpport)
raws = s; /* match with raw socket */
if (port && s->bind_addr.udpport == port)
......@@ -367,6 +374,8 @@ int net_bh_poll(void)
return 1;
}
pp_printf("F2\n");
q = &s->queue;
q_required =
sizeof(struct wr_ethhdr) + recvd + sizeof(struct hw_timestamp) + 2;
......@@ -378,6 +387,8 @@ int net_bh_poll(void)
return 1;
}
pp_printf("F3\n");
size = recvd;
q->avail -= wrap_copy_out(q, &size, 2);
......
softpll/softpll_ng.c
View file @ 4a549f5c
......@@ -20,8 +20,6 @@
#include "irq.h"
#define pll_verbose pp_printf
#ifdef CONFIG_SPLL_FIFO_LOG
struct spll_fifo_log fifo_log[FIFO_LOG_LEN];
#define HAS_FIFO_LOG 1
......
wrc_main.c
View file @ 4a549f5c
......@@ -132,7 +132,7 @@ static int wrc_check_link(void)
int rv = 0;
if (!prev_state && state) {
wrc_verbose("Link up.\n");
main_dbg("Link up.\n");
event_post( WRC_EVENT_LINK_UP );
gen_gpio_out(&pin_sysc_led_link, 1);
sfp_match(0);
......@@ -140,7 +140,7 @@ static int wrc_check_link(void)
link_status = NETIF_LINK_WENT_UP;
rv = 1;
} else if (prev_state && !state) {
wrc_verbose("Link down.\n");
main_dbg("Link down.\n");
prev_timing_ok = 0;
event_post( WRC_EVENT_LINK_DOWN );
gen_gpio_out(&pin_sysc_led_link, 0);
......
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