WR2RF-VME-BOBR
Description
A second development phase for this card may be to target it as a replacement for the existing BOBR (Beam Synchronous Timing Receiver Interface for the Beam Observation System) card. It will be compatible with the BE-BI VME format factor, and specifically target usage in slot 17.
The RF could be sourced directly from the Low Level RF system via Frequency Tuning Words (FTW) broadcast over a WR network. This approach would bypass the existing TTC system, although it's anticipated that both would operate side-by-side until confidence in the new system had been developed.
Main Features
In addition to the features developed for the wr2rf-vme card, the wr2rf-vme-bobr card would also need to support the following features.
Beam Synchronous Timing Message
In addition to recovering the RF signal, bunch and turn clocks the BOBR card needs to receive the Beam Synchronous Timing Message. This BST message should also be transmitted over the White Rabbit network. Therefore, it would be beneficial if this design could also behave as a CTG-BSTmaster and inject the BST Message into a WR network.
The BST Message currently contains three types of information:
- UTC timing - now provided directly via White Rabbit
- BI specific triggers - we need a new way to implement these triggers.
- Beam properties - for example; momentum, turn number, etc.
Time of Flight Corrections
BE-BI have a requirement that:
- Bunch clocks are compensated for time of flight.
- Turn clocks are compensated for time of flight.
For the SPS accelerator the time of flight for the particles changes as they are accelerated.
Latency
Distributing the timing and triggers via a White Rabbit network will incur a latency cost. Each switch may contribute up to 10 microseconds of delay (equivalent to 2 km of fibre cable) in worst case conditions. Therefore, it is likely that the implementation will have to work with a latency measured in multiples of the turn or orbit period (23.1 microseconds for SPS).
Connectivity and IO
- A 6U VME format factor that supports BE-BI's VME crates and connections to the PO connector.
- 16x P0 outputs selected from the BST message.
- 8x P0 outputs from the bunch selector RAM.
- 2x P0 outputs of the bunch clock, LVDS and TTL.
- 2x P0 outputs of the orbit clock, LVDS and TTL.
Details and layout requirements for the P0
Additional information
- The original BOBR engineering specification
- The CTG-BST master
- Background and scope of the BST message
- The SPS BST message
- General BST related wikis
- Official production documentation: EDA-0
- VME P0 Connector Allocations