softpll-unify: header-related changes (no effect on rt_cpu.bin)

This removes defs.h by copying the only two inlines into the only file
that uses them.

It also replaces uart.h with vuart.h, which is a compatible superset
(so now uart.c here and wrpc-sw are almost the same).

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

rt/dev/ad9516.c

@@ -11,15 +11,22 @@
 #include "syscon.h"
 #include "gpio.h"
 
-
-#include "ad9516.h"
-
 #include "rt_ipc.h"
 
 #ifndef ARRAY_SIZE
 #define ARRAY_SIZE(a) (sizeof(a)/sizeof(a[0]))
 #endif
 
+static inline void writel(uint32_t data, void *where)
+{
+	* (volatile uint32_t *)where = data;
+}
+
+static inline uint32_t readl(void *where)
+{
+	return * (volatile uint32_t *)where;
+}
+
 struct ad9516_reg {
 	uint16_t reg;
 	uint8_t val;

rt/dev/uart.c

-#include "defs.h"
 #include "board.h"
 #include "uart.h"
 
-#include <hw/wb_uart.h>
+#include <hw/wb_vuart.h>
 
 #define CALC_BAUD(baudrate) \
     ( ((( (unsigned long long)baudrate * 8ULL) << (16 - 7)) + \
@@ -38,4 +37,4 @@ int uart_poll()
 int uart_read_byte()
 {
  	return uart ->RDR & 0xff;
-}
\ No newline at end of file
+}

rt/include/defs.h

-#ifndef __DEFS_H
-#define __DEFS_H
-
-#include <stdint.h>
-
-static inline void writel(uint32_t data, void *where)
-{
-	* (volatile uint32_t *)where = data;
-}
-
-static inline uint32_t readl(void *where)
-{
-	return * (volatile uint32_t *)where;
-}
-
-
-#endif

rt/include/hw/wb_uart.h → rt/include/hw/wb_vuart.h

 /*
-  Register definitions for slave core: Simple Wishbone UART
+  Register definitions for slave core: Virtual UART
 
-  * File           : ../../../../software/include/hw/wb_uart.h
-  * Author         : auto-generated by wbgen2 from uart.wb
-  * Created        : Mon Feb 21 22:25:02 2011
+  * File           : wb_vuart.h
+  * Author         : auto-generated by wbgen2 from wb_virtual_uart.wb
+  * Created        : Wed Apr  6 23:02:01 2011
   * Standard       : ANSI C
 
-    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE uart.wb
+    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wb_virtual_uart.wb
     DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
 
 */
 
-#ifndef __WBGEN2_REGDEFS_UART_WB
-#define __WBGEN2_REGDEFS_UART_WB
+#ifndef __WBGEN2_REGDEFS_WB_VIRTUAL_UART_WB
+#define __WBGEN2_REGDEFS_WB_VIRTUAL_UART_WB
 
-#include <stdint.h>
+#include <inttypes.h>
 
 #if defined( __GNUC__)
 #define PACKED __attribute__ ((packed))
@@ -30,7 +30,6 @@
 #define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
 #endif
 
-
 /* definitions for register: Status Register */
 
 /* definitions for field: TX busy in reg: Status Register */
@@ -56,24 +55,42 @@
 #define UART_RDR_RX_DATA_SHIFT                0
 #define UART_RDR_RX_DATA_W(value)             WBGEN2_GEN_WRITE(value, 0, 8)
 #define UART_RDR_RX_DATA_R(reg)               WBGEN2_GEN_READ(reg, 0, 8)
-/* [0x0]: REG Status Register */
-#define UART_REG_SR 0x00000000
-/* [0x4]: REG Baudrate control register */
-#define UART_REG_BCR 0x00000004
-/* [0x8]: REG Transmit data regsiter */
-#define UART_REG_TDR 0x00000008
-/* [0xc]: REG Receive data regsiter */
-#define UART_REG_RDR 0x0000000c
+
+/* definitions for register: FIFO 'UART TX FIFO' data output register 0 */
+
+/* definitions for field: Char sent by UART to TX in reg: FIFO 'UART TX FIFO' data output register 0 */
+#define UART_DEBUG_R0_TX_MASK                 WBGEN2_GEN_MASK(0, 8)
+#define UART_DEBUG_R0_TX_SHIFT                0
+#define UART_DEBUG_R0_TX_W(value)             WBGEN2_GEN_WRITE(value, 0, 8)
+#define UART_DEBUG_R0_TX_R(reg)               WBGEN2_GEN_READ(reg, 0, 8)
+
+/* definitions for register: FIFO 'UART TX FIFO' control/status register */
+
+/* definitions for field: FIFO full flag in reg: FIFO 'UART TX FIFO' control/status register */
+#define UART_DEBUG_CSR_FULL                   WBGEN2_GEN_MASK(16, 1)
+
+/* definitions for field: FIFO empty flag in reg: FIFO 'UART TX FIFO' control/status register */
+#define UART_DEBUG_CSR_EMPTY                  WBGEN2_GEN_MASK(17, 1)
+
+/* definitions for field: FIFO counter in reg: FIFO 'UART TX FIFO' control/status register */
+#define UART_DEBUG_CSR_USEDW_MASK             WBGEN2_GEN_MASK(0, 8)
+#define UART_DEBUG_CSR_USEDW_SHIFT            0
+#define UART_DEBUG_CSR_USEDW_W(value)         WBGEN2_GEN_WRITE(value, 0, 8)
+#define UART_DEBUG_CSR_USEDW_R(reg)           WBGEN2_GEN_READ(reg, 0, 8)
 
 PACKED struct UART_WB {
-  /* [0x0]: REG Status Register */
-  uint32_t SR;
-  /* [0x4]: REG Baudrate control register */
-  uint32_t BCR;
-  /* [0x8]: REG Transmit data regsiter */
-  uint32_t TDR;
-  /* [0xc]: REG Receive data regsiter */
-  uint32_t RDR;
+	/* [0x0]: REG Status Register */
+	uint32_t SR;
+	/* [0x4]: REG Baudrate control register */
+	uint32_t BCR;
+	/* [0x8]: REG Transmit data regsiter */
+	uint32_t TDR;
+	/* [0xc]: REG Receive data regsiter */
+	uint32_t RDR;
+	/* [0x10]: REG FIFO 'UART TX FIFO' data output register 0 */
+	uint32_t DEBUG_R0;
+	/* [0x14]: REG FIFO 'UART TX FIFO' control/status register */
+	uint32_t DEBUG_CSR;
 };
 
 #endif

rt/include/stdint.h

-#ifndef __ARCH_LM32_STDINT_H__
-#define __ARCH_LM32_STDINT_H__
-
-/*
- * We miss a stdint.h in our compiler, so provide some types here,
- * knowing the CPU is 32-bits and uses LP32 model
- */
-
-typedef unsigned char	uint8_t;
-typedef unsigned short	uint16_t;
-typedef unsigned long	uint32_t;
-typedef unsigned long	long uint64_t;
-
-typedef signed char	int8_t;
-typedef signed short	int16_t;
-typedef signed long	int32_t;
-typedef signed long	long int64_t;
-
-#endif /* __ARCH_LM32_STDINT_H__ */

rt/include/syscon.h

 #ifndef __SYSCON_H
 #define __SYSCON_H
 
-#include "defs.h"
+#include <stdint.h>
 
 #define TICS_PER_SECOND 100000
 

rt/include/wrc.h

 #ifndef __WRC_H
 #define __WRC_H
 
-#include "defs.h"
 #include "syscon.h"
 
 #define PPS_WIDTH (10 * 1000 * 1000 / 16) /* 10ms */

rt/main.c

-#include "defs.h"
 #include "uart.h"
 #include "syscon.h"