board: bring up more wrpc signals (includign aux_clks)

b3ad9a9c · Dimitris Lampridis · a9ef1b0c · b3ad9a9c · b3ad9a9c · b3ad9a9c
Commit b3ad9a9c authored Mar 08, 2017 by Dimitris Lampridis
12 changed files
--- a/board/common/wr_board_pkg.vhd
+++ b/board/common/wr_board_pkg.vhd
--- a/board/common/xwrc_board_common.vhd
+++ b/board/common/xwrc_board_common.vhd
--- a/board/spec/wr_spec_pkg.vhd
+++ b/board/spec/wr_spec_pkg.vhd
--- a/board/spec/wrc_board_spec.vhd
+++ b/board/spec/wrc_board_spec.vhd
--- a/board/spec/xwrc_board_spec.vhd
+++ b/board/spec/xwrc_board_spec.vhd
--- a/board/svec/wr_svec_pkg.vhd
+++ b/board/svec/wr_svec_pkg.vhd
--- a/board/svec/wrc_board_svec.vhd
+++ b/board/svec/wrc_board_svec.vhd
--- a/board/svec/xwrc_board_svec.vhd
+++ b/board/svec/xwrc_board_svec.vhd
--- a/board/vfchd/wr_vfchd_pkg.vhd
+++ b/board/vfchd/wr_vfchd_pkg.vhd
--- a/board/vfchd/wrc_board_vfchd.vhd
+++ b/board/vfchd/wrc_board_vfchd.vhd
--- a/board/vfchd/xwrc_board_vfchd.vhd
+++ b/board/vfchd/xwrc_board_vfchd.vhd
--- a/top/spec_ref_design/spec_wr_ref_top.vhd
+++ b/top/spec_ref_design/spec_wr_ref_top.vhd
@@ -7,7 +7,7 @@
 -- Author(s)  : Grzegorz Daniluk <grzegorz.daniluk@cern.ch>
 -- Company    : CERN (BE-CO-HT)
 -- Created    : 2017-02-20
-- Last update: 2017-02-22
+-- Last update: 2017-03-08
 -- Standard   : VHDL'93
 -------------------------------------------------------------------------------
 -- Description: Top-level file for the WRPC reference design on the SPEC.
@@ -428,8 +428,8 @@ begin  -- architecture top
      clk_10m_ext_ref_i   => clk_ext_10m,
      clk_sys_62m5_o      => clk_sys_62m5,
      clk_ref_125m_o      => clk_ref_125m,
-      rst_62m5_n_o        => rst_sys_62m5_n,
-      rst_125m_n_o        => rst_ref_125m_n,
+      rst_sys_62m5_n_o    => rst_sys_62m5_n,
+      rst_ref_125m_n_o    => rst_ref_125m_n,

      plldac_sclk_o       => plldac_sclk_o,
      plldac_din_o        => plldac_din_o,