Tomasz Wlostowski authored 1 year ago and Tristan Gingold committed 1 year ago

- we now use Cheby for the MDIO register layout (small changes in the naming)
- dropped LPC_CTRL/LPC_STAT registers in favour of a full WB master interface to the PHY.

Tomasz Wlostowski authored 1 year ago and Tristan Gingold committed 1 year ago

wr_endpoint: assume Endpoint's private sub-cores are always present. No need to declare them as components.

Tomasz Wlostowski authored 1 year ago and Tristan Gingold committed 1 year ago

(use with wrpc-sw freqmon command)

Tomasz Wlostowski authored 1 year ago and Tristan Gingold committed 1 year ago

through the numerous layers of wrappers... :/

no upper bound for etherbone

modules/wr_streamers: make DBG_WORD optional (generic parameter). Remove MARK_DEBUG attributes to facilitate timing closure

- REQUIRES V5 DEV BRANCH WRPC-SW
- syscon diag registers (read-write) are now remapped at offset (periph + 0x900)
- user diag registers are at the previous address (periph + 0x800), keeping the legacy layout
- the new scheme uses much less FF/LUT resources and allows adding arbitrary diagnostics without affecting the SYSCON layout or HDL modifications

wr_core: allow to select legacy (128kB)/increased (256kB) LM32 RAM address space. Default is 128kB (legacy)