update testbeches Manifests to use new hdlmake

testbench/top_level/Manifest.py

 action = "simulation"
 target = "xilinx"
+syn_device = "xc6slx45t"
+syn_grade = "-3"
+syn_package = "fgg484"
+sim_tool = "modelsim"
+top_module = "main"
 fetchto = "../../ip_cores"
 vlog_opt="+incdir+../../sim +incdir+gn4124_bfm"
 
+include_dirs = [ "../../sim", "gn4124_bfm" ]
+
 files = [ "main.sv" ]
 
 modules = { "local" :  [ "../..",

testbench/wr_endpoint/full_tb/Manifest.py

 target = "xilinx"
 action = "simulation"
+syn_device = "xc6slx45t"
+syn_grade = "-3"
+syn_package = "fgg484"
+sim_tool = "modelsim"
+top_module = "main"
 files = "main.sv"
 fetchto = "../../../ip_cores"
 
 vlog_opt="+incdir+../../../sim +incdir+../../../sim/fabric_emu"
 
+include_dirs = [ "../../../sim" ]
+
 modules ={"git" : [    "git@ohwr.org:hdl-core-lib/general-cores.git" ],
 					"local" : ["../../../modules/wr_endpoint", 
 					           "../../../modules/timing",

testbench/wr_fabric_reg/Manifest.py

+action = "simulation"
+files = "main.sv"
+syn_device = "xc6slx45t"
+syn_grade = "-3"
+syn_package = "fgg484"
+sim_tool = "modelsim"
+top_module = "main"
+fetchto = "../../ip_cores"
+
+target = "xilinx"
+
+vlog_opt="+incdir+../../sim"
+
+include_dirs = [ "../../sim" ]
+
+modules ={"local" : ["../../",
+			"../../ip_cores/general-cores",
+			"../../ip_cores/etherbone-core",
+			"../../ip_cores/gn4124-core"]}
+    

testbench/wr_minic/Manifest.py

 action = "simulation"
 target = "xilinx"
-#syn_device = "xc6slx45t"
-#syn_grade = "-3"
-#syn_package = "fgg484"
-#sim_tool = "modelsim"
-#top_module = "main"
+syn_device = "xc6slx45t"
+syn_grade = "-3"
+syn_package = "fgg484"
+sim_tool = "modelsim"
+top_module = "main"
 fetchto = "../../ip_cores"
 vlog_opt = "+incdir+../../sim"
 
+include_dirs = [ "../../sim" ]
+
 files = [ "main.sv" ]
 
 modules = { "local" : [ "../../",

testbench/wrc_core/main_tb/Manifest.py

 action = "simulation"
 target = "xilinx"
+syn_device = "xc6slx45t"
+syn_grade = "-3"
+syn_package = "fgg484"
+sim_tool = "modelsim"
+top_module = "main"
 fetchto = "../../../ip_cores"
 vlog_opt = "+incdir+../../../sim"
 
 files = [ "main.sv" ]
 
+include_dirs = [ "../../../sim" ]
+
 modules = { "local" : [ "../../..",
 			"../../../modules/fabric",
 			"../../../ip_cores/general-cores",
 			"../../../ip_cores/etherbone-core",
-			"../../../ip_cores/gn4124-core"]}
+			"../../../ip_cores/gn4124-core",
+                        "../../../ip_cores/urv-core" ]}
 
 
 

testbench/xwrf_loopback/Manifest.py

 action = "simulation"
 target = "xilinx"
+syn_device = "xc6slx45t"
+syn_grade = "-3"
+syn_package = "fgg484"
+sim_tool = "modelsim"
+top_module = "main"
 fetchto = "../../ip_cores"
 vlog_opt = "+incdir+../../sim"
 
+include_dirs = [ "../../sim" ]
+
 files = [ "main.sv" ]
 
 modules = { "local" : [ "../..",

testbench/xwrf_mux/Manifest.py

 action = "simulation"
+target = "xilinx"
 files = "main.sv"
+syn_device = "xc6slx45t"
+syn_grade = "-3"
+syn_package = "fgg484"
+sim_tool = "modelsim"
+top_module = "main"
 fetchto = "../../ip_cores"
-
-target = "xilinx"
-
 vlog_opt="+incdir+../../sim"
 
-modules ={"local" : "../../" }
+include_dirs = [ "../../sim" ]
+
+modules ={"local" : ["../../",
+			"../../ip_cores/general-cores",
+			"../../ip_cores/etherbone-core",
+			"../../ip_cores/gn4124-core"]}