V3 Bootloader - VMEbus reset locks up SVEC
After reboot of the VMEbus-CPU, which generates a VMEbus reset pulse (length approx. 250 ms), the software is unable to access the SVEC boards application FPGA or reconfigure it with a new bitstream file using the system FPGA. This error condition has to be resolved by a VMEbus power cycle.
The bootloader version 3 causes this problem. After downgrading the bootloader to version 2 the software is able to access the SVEC boards application FPGA after a reboot of the VMEbus-CPU (VMEbus reset). So it seems that there is a bug in the bootloader version 3 that prevents the VMEbus-CPU from accessing the application or system FPGA of the SVEC board.