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Simple VME FMC Carrier SVEC
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Simple VME FMC Carrier SVEC
Commits
a76d5f5a
Commit
a76d5f5a
authored
Nov 29, 2012
by
Tomasz Wlostowski
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hdl: bootloader testbench - wip
parent
ba4fbc75
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3 changed files
with
71 additions
and
43 deletions
+71
-43
Manifest.py
hdl/testbench/sfpga_bootloader/Manifest.py
+1
-1
main.sv
hdl/testbench/sfpga_bootloader/main.sv
+21
-1
wave.do
hdl/testbench/sfpga_bootloader/wave.do
+49
-41
No files found.
hdl/testbench/sfpga_bootloader/Manifest.py
View file @
a76d5f5a
action
=
"simulation"
action
=
"simulation"
target
=
"xilinx"
target
=
"xilinx"
fetchto
=
"../../ip_cores"
fetchto
=
"../../ip_cores"
vlog_opt
=
"+incdir+../../sim/vme64x_bfm +incdir+../../sim/wb"
vlog_opt
=
"+incdir+../../sim/vme64x_bfm +incdir+../../sim/wb
+incdir+../../sim/regs +incdir+../../sim
"
files
=
[
"main.sv"
,
"glbl.v"
,
"SIM_CONFIG_S6_SERIAL.v"
]
files
=
[
"main.sv"
,
"glbl.v"
,
"SIM_CONFIG_S6_SERIAL.v"
]
...
...
hdl/testbench/sfpga_bootloader/main.sv
View file @
a76d5f5a
...
@@ -2,6 +2,26 @@
...
@@ -2,6 +2,26 @@
`include
"svec_vme_buffers.svh"
`include
"svec_vme_buffers.svh"
`include
"regs/xloader_regs.vh"
`include
"regs/xloader_regs.vh"
`define
WIRE_VME_PINS2
(
slot_id
)
\
.
VME_AS_n_i
(
VME_AS_n
),
\
.
VME_RST_n_i
(
VME_RST_n
),
\
.
VME_WRITE_n_i
(
VME_WRITE_n
),
\
.
VME_AM_i
(
VME_AM
),
\
.
VME_DS_n_i
(
VME_DS_n
),
\
.
VME_GA_i
(
_gen_ga
(
slot_id
)),
\
.
VME_DTACK_n_o
(
VME_DTACK_n
),
\
.
VME_LWORD_n_b
(
VME_LWORD_n
),
\
.
VME_ADDR_b
(
VME_ADDR
),
\
.
VME_DATA_b
(
VME_DATA
),
\
.
VME_BBSY_n_i
(
VME_BBSY_n
),
\
.
VME_DTACK_OE_o
(
VME_DTACK_OE
),
\
.
VME_DATA_DIR_o
(
VME_DATA_DIR
),
\
.
VME_DATA_OE_N_o
(
VME_DATA_OE_N
),
\
.
VME_ADDR_DIR_o
(
VME_ADDR_DIR
),
\
.
VME_ADDR_OE_N_o
(
VME_ADDR_OE_N
)
module
main
;
module
main
;
reg
rst_n
=
0
;
reg
rst_n
=
0
;
...
@@ -29,7 +49,7 @@ module main;
...
@@ -29,7 +49,7 @@ module main;
.
lclk_n_i
(
clk_20m
)
,
.
lclk_n_i
(
clk_20m
)
,
.
rst_n_i
(
rst_n
)
,
.
rst_n_i
(
rst_n
)
,
`WIRE_VME_PINS
(
8
)
,
`WIRE_VME_PINS
2
(
8
)
,
.
boot_clk_o
(
cclk
)
,
.
boot_clk_o
(
cclk
)
,
.
boot_config_o
(
program_b
)
,
.
boot_config_o
(
program_b
)
,
...
...
hdl/testbench/sfpga_bootloader/wave.do
View file @
a76d5f5a
onerror {resume}
onerror {resume}
quietly WaveActivateNextPane {} 0
quietly WaveActivateNextPane {} 0
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/g_interface_mode
add wave -noupdate /main/DUT/lclk_n_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/g_address_granularity
add wave -noupdate /main/DUT/rst_n_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/clk_sys_i
add wave -noupdate /main/DUT/VME_AS_n_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/rst_n_i
add wave -noupdate /main/DUT/VME_RST_n_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_cyc_i
add wave -noupdate /main/DUT/VME_WRITE_n_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_stb_i
add wave -noupdate /main/DUT/VME_AM_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_we_i
add wave -noupdate /main/DUT/VME_DS_n_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_adr_i
add wave -noupdate /main/DUT/VME_GA_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_sel_i
add wave -noupdate /main/DUT/VME_DTACK_n_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_dat_i
add wave -noupdate /main/DUT/VME_LWORD_n_b
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_dat_o
add wave -noupdate /main/DUT/VME_ADDR_b
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_ack_o
add wave -noupdate /main/DUT/VME_DATA_b
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_stall_o
add wave -noupdate /main/DUT/VME_DTACK_OE_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/xlx_cclk_o
add wave -noupdate /main/DUT/VME_DATA_DIR_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/xlx_din_o
add wave -noupdate /main/DUT/VME_DATA_OE_N_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/xlx_program_b_o
add wave -noupdate /main/DUT/VME_ADDR_DIR_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/xlx_init_b_i
add wave -noupdate /main/DUT/VME_ADDR_OE_N_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/xlx_done_i
add wave -noupdate /main/DUT/VME_BBSY_n_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/xlx_suspend_o
add wave -noupdate /main/DUT/boot_clk_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/xlx_m_o
add wave -noupdate /main/DUT/boot_config_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/boot_trig_p1_o
add wave -noupdate /main/DUT/boot_done_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/boot_exit_p1_o
add wave -noupdate /main/DUT/boot_dout_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/boot_en_i
add wave -noupdate /main/DUT/boot_status_i
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/gpio_o
add wave -noupdate /main/DUT/debugled_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/state
add wave -noupdate /main/DUT/pll_ce_o
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/clk_div
add wave -noupdate /main/DUT/VME_DATA_o_int
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/tick
add wave -noupdate /main/DUT/vme_dtack_oe_int
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/init_b_synced
add wave -noupdate /main/DUT/VME_DTACK_n_int
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/done_synced
add wave -noupdate /main/DUT/vme_data_dir_int
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/timeout_counter
add wave -noupdate /main/DUT/VME_DATA_OE_N_int
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_in
add wave -noupdate /main/DUT/wb_vme_in
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/wb_out
add wave -noupdate /main/DUT/wb_vme_out
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/regs_in
add wave -noupdate /main/DUT/passive
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/regs_out
add wave -noupdate /main/DUT/gpio
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/d_data
add wave -noupdate /main/DUT/boot_en
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/d_size
add wave -noupdate /main/DUT/boot_trig_p1
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/d_last
add wave -noupdate /main/DUT/boot_exit_p1
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/bit_counter
add wave -noupdate /main/DUT/CONTROL
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/boot_state
add wave -noupdate /main/DUT/TRIG0
add wave -noupdate -radix hexadecimal /main/DUT/U_Xilinx_Loader/U_Wrapped_XLDR/startup_count
add wave -noupdate /main/DUT/TRIG1
add wave -noupdate /main/DUT/TRIG2
add wave -noupdate /main/DUT/TRIG3
add wave -noupdate /main/DUT/boot_config_int
add wave -noupdate /main/DUT/erase_afpga_n
add wave -noupdate /main/DUT/erase_afpga_n_d0
add wave -noupdate /main/DUT/pllout_clk_fb_sys
add wave -noupdate /main/DUT/pllout_clk_sys
add wave -noupdate /main/DUT/clk_sys
TreeUpdate [SetDefaultTree]
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {1
23219856
ps} 0}
WaveRestoreCursors {{Cursor 1} {1
539887
ps} 0}
configure wave -namecolwidth 177
configure wave -namecolwidth 177
configure wave -valuecolwidth 100
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -justifyvalue left
...
...
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