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Simple VME FMC Carrier SVEC
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Simple VME FMC Carrier SVEC
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9caf5000
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9caf5000
authored
Sep 13, 2017
by
Dimitris Lampridis
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golden: add missing timing constraint for 20MHz VCXO clock input. Solves #1641.
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ca6d8cfe
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svec_top.ucf
hdl/top/golden/svec_top.ucf
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hdl/top/golden/svec_top.ucf
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9caf5000
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@@ -255,4 +255,9 @@ NET "fmc0_prsntm2c_n_i" IOSTANDARD = "LVCMOS33";
NET "fmc0_scl_b" IOSTANDARD = "LVCMOS33";
NET "fmc0_sda_b" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Timing constraints
#----------------------------------------
NET "clk_20m_vcxo_i" TNM_NET = clk_20m_vcxo_i;
TIMESPEC TS_clk_20m_vcxo_i = PERIOD "clk_20m_vcxo_i" 50 ns HIGH 50%;
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