Commit 3ee49633 authored by Greg's avatar Greg

fixed cosmetic issues

parent 98f24cad
......@@ -4,7 +4,7 @@ Version=1.0
[OutputGroup1]
Name=SVEC.OutJob
Description=
TargetOutputMedium=Liste Mat BOM
TargetOutputMedium=layout
VariantName=[No Variations]
VariantScope=0
CurrentConfigurationName=
......@@ -106,10 +106,10 @@ OutputName4=Bill of Materials
OutputCategory4=Report
OutputDocumentPath4=
OutputVariantName4=
OutputEnabled4=1
OutputEnabled4=0
OutputEnabled4_OutputMedium1=0
OutputEnabled4_OutputMedium2=1
OutputEnabled4_OutputMedium3=1
OutputEnabled4_OutputMedium3=0
OutputEnabled4_OutputMedium4=0
OutputEnabled4_OutputMedium5=0
OutputEnabled4_OutputMedium6=1
......@@ -254,14 +254,14 @@ OutputName11=PCB Prints
OutputCategory11=Documentation
OutputDocumentPath11=
OutputVariantName11=
OutputEnabled11=0
OutputEnabled11=1
OutputEnabled11_OutputMedium1=0
OutputEnabled11_OutputMedium2=0
OutputEnabled11_OutputMedium3=0
OutputEnabled11_OutputMedium4=0
OutputEnabled11_OutputMedium5=0
OutputEnabled11_OutputMedium6=0
OutputEnabled11_OutputMedium7=0
OutputEnabled11_OutputMedium7=1
OutputDefault11=0
PageOptions11=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1
Configuration11_Name1=OutputConfigurationParameter1
......
......@@ -367,7 +367,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
[Document22]
DocumentPath=Schematics\VME_buffers.SchDoc
DocumentPath=Schematics\VME_buffers_address.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -383,7 +383,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
[Document23]
DocumentPath=Schematics\VME_buffers.Harness
DocumentPath=Schematics\VME_connectors.Harness
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -399,7 +399,39 @@ DItemRevisionGUID=
GenerateClassCluster=0
[Document24]
DocumentPath=Schematics\VME_connectors.Harness
DocumentPath=Schematics\VME_buffers.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None
DItemRevisionGUID=
GenerateClassCluster=0
[Document25]
DocumentPath=Schematics\VME_buffers_data.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None
DItemRevisionGUID=
GenerateClassCluster=0
[Document26]
DocumentPath=Schematics\VME_buffers.Harness
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
......@@ -419,11 +451,11 @@ DocumentPath=Project Outputs for SVEC\Design Rule Check - SVEC.html
DItemRevisionGUID=
[GeneratedDocument2]
DocumentPath=Project Outputs for SVEC\Reports\Power_supplies.BOM
DocumentPath=Project Outputs for SVEC\Reports\SFPGA.BOM
DItemRevisionGUID=
[GeneratedDocument3]
DocumentPath=Project Outputs for SVEC\Reports\Power_supplies.CSV
DocumentPath=Project Outputs for SVEC\Reports\SFPGA.CSV
DItemRevisionGUID=
[PCBConfiguration1]
......@@ -949,53 +981,53 @@ Name=Report Outputs
Description=
TargetPrinter=OKI B4100 (MS)
PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintWhat=1
OutputType1=ComponentCrossReference
OutputName1=Component Cross Reference Report
OutputType1=SimpleBOM
OutputName1=Simple BOM
OutputDocumentPath1=
OutputVariantName1=[No Variations]
OutputDefault1=0
OutputType2=Script
OutputName2=Script Output
Configuration1_Name1=OutputConfigurationParameter1
Configuration1_Item1=Record=SimpleBOMView|SimpleBOMMode=0
OutputType2=BOM_PartType
OutputName2=Bill of Materials
OutputDocumentPath2=
OutputVariantName2=[No Variations]
OutputDefault2=0
OutputType3=SinglePinNetReporter
OutputName3=Report Single Pin Nets
PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1
Configuration2_Name1=Filter
Configuration2_Item1=545046300E5446696C74657257726170706572000D46696C7465722E416374697665090F46696C7465722E43726974657269610A04000000000000000000
Configuration2_Name2=General
Configuration2_Item2=OpenExported=False|AddToProject=False|ForceFit=True|NotFitted=False|Database=False|IncludePCBData=False|ShowExportOptions=True|TemplateFilename=..\..\..\Altium\CERN_Files\Templates\BOM\CERN-AltiumMat Template.XLT|BatchMode=5|FormWidth=1343|FormHeight=796|SupplierProdQty=1|SupplierAutoQty=False|SupplierUseCachedPricing=False|SupplierCurrency=<none>
Configuration2_Name3=GroupOrder
Configuration2_Item3=Part Number=True
Configuration2_Name4=PCBDocument
Configuration2_Item4=
Configuration2_Name5=SortOrder
Configuration2_Item5=Designator=Up
Configuration2_Name6=VisibleOrder
Configuration2_Item6=Part Number=241|Designator=97|Quantity=62|Part Description=241|Comment=87|Manufacturer=162|Case=127|Manufacturer Part Number=168|Footprint=100|Mounted=100
OutputType3=ReportHierarchy
OutputName3=Report Project Hierarchy
OutputDocumentPath3=
OutputVariantName3=[No Variations]
OutputDefault3=0
OutputType4=SimpleBOM
OutputName4=Simple BOM
Configuration3_Name1=OutputConfigurationParameter1
Configuration3_Item1=Record=ReportHierarchyView|ReportHierarchyMode=0
OutputType4=ComponentCrossReference
OutputName4=Component Cross Reference Report
OutputDocumentPath4=
OutputVariantName4=[No Variations]
OutputDefault4=0
Configuration4_Name1=OutputConfigurationParameter1
Configuration4_Item1=Record=SimpleBOMView|SimpleBOMMode=0
OutputType5=BOM_PartType
OutputName5=Bill of Materials
OutputType5=Script
OutputName5=Script Output
OutputDocumentPath5=
OutputVariantName5=[No Variations]
OutputDefault5=0
PageOptions5=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PaperKind=A4|PrintScaleMode=1
Configuration5_Name1=Filter
Configuration5_Item1=545046300E5446696C74657257726170706572000D46696C7465722E416374697665090F46696C7465722E43726974657269610A04000000000000000000
Configuration5_Name2=General
Configuration5_Item2=OpenExported=False|AddToProject=False|ForceFit=True|NotFitted=False|Database=False|IncludePCBData=False|ShowExportOptions=True|TemplateFilename=..\..\..\Altium\CERN_Files\Templates\BOM\CERN-AltiumMat Template.XLT|BatchMode=5|FormWidth=1343|FormHeight=796|SupplierProdQty=1|SupplierAutoQty=False|SupplierUseCachedPricing=False|SupplierCurrency=<none>
Configuration5_Name3=GroupOrder
Configuration5_Item3=Part Number=True
Configuration5_Name4=PCBDocument
Configuration5_Item4=
Configuration5_Name5=SortOrder
Configuration5_Item5=Designator=Up
Configuration5_Name6=VisibleOrder
Configuration5_Item6=Part Number=241|Designator=97|Quantity=62|Part Description=241|Comment=87|Manufacturer=162|Case=127|Manufacturer Part Number=168|Footprint=100|Mounted=100
OutputType6=ReportHierarchy
OutputName6=Report Project Hierarchy
OutputType6=SinglePinNetReporter
OutputName6=Report Single Pin Nets
OutputDocumentPath6=
OutputVariantName6=[No Variations]
OutputDefault6=0
Configuration6_Name1=OutputConfigurationParameter1
Configuration6_Item1=Record=ReportHierarchyView|ReportHierarchyMode=0
[OutputGroup7]
Name=Other Outputs
......
......@@ -16,6 +16,8 @@ Record=SheetSymbol|SourceDocument=SVEC_top.SchDoc|Designator=U_SFPGA_power|SchDe
Record=SheetSymbol|SourceDocument=SVEC_top.SchDoc|Designator=U_USB|SchDesignator=U_USB|FileName=USB_interface.SchDoc|SymbolType=Normal|RawFileName=USB_interface.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=SVEC_top.SchDoc|Designator=U_VME_buffers|SchDesignator=U_VME_buffers|FileName=VME_buffers.SchDoc|SymbolType=Normal|RawFileName=VME_buffers.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=SVEC_top.SchDoc|Designator=U_VME_connectors|SchDesignator=U_VME_connectors|FileName=VME_connectors.SchDoc|SymbolType=Normal|RawFileName=VME_connectors.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=VME_buffers.SchDoc|Designator=U_VME_buffers_address|SchDesignator=U_VME_buffers_address|FileName=VME_buffers_address.SchDoc|SymbolType=Normal|RawFileName=VME_buffers_address.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=VME_buffers.SchDoc|Designator=U_VME_buffers_data|SchDesignator=U_VME_buffers_data|FileName=VME_buffers_data.SchDoc|SymbolType=Normal|RawFileName=VME_buffers_data.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=TopLevelDocument|FileName=SVEC_top.SchDoc
Record=FPGA_COMPONENT|BaseComponentDesignator=IC19|DocumentName=AFPGA_FMC1_bank0.SchDoc|LibraryReference=XC6SLX150T-2FGG900C|SubProjectPath= |Configuration= |Description=SPARTAN-6, FPGA, 900-Ball BGA, Commercial Grade, Pb-Free|NexusDeviceId=XC6SLX150T-2FGG900C|SubPartUniqueId1=XRVEKUOA|SubPartDocPath1=AFPGA_FMC1_bank0.SchDoc|SubPartUniqueId2=HKUDBHDL|SubPartDocPath2=AFPGA_FMC1_bank0.SchDoc|SubPartUniqueId3=GWOKVDBL|SubPartDocPath3=AFPGA_VME_IO_banks1+3.SchDoc|SubPartUniqueId4=KSJFNPXS|SubPartDocPath4=AFPGA_FMC2_bank2.SchDoc|SubPartUniqueId5=QUCEVYPG|SubPartDocPath5=AFPGA_FMC2_bank2.SchDoc|SubPartUniqueId6=DPHTKRJB|SubPartDocPath6=AFPGA_VME_IO_banks1+3.SchDoc|SubPartUniqueId7=PBOSVEVY|SubPartDocPath7=AFPGA_VME_IO_banks1+3.SchDoc|SubPartUniqueId8=VYVXECCI|SubPartDocPath8=DDR3.SchDoc|SubPartUniqueId9=HGYTKHSM|SubPartDocPath9=DDR3_2.SchDoc|SubPartUniqueId10=HVOTMCXP|SubPartDocPath10=FPGA_GTP.SchDoc|SubPartUniqueId11=DJFABCDT|SubPartDocPath11=FPGA_GTP.SchDoc|SubPartUniqueId12=SUEJCWVA|SubPartDocPath12=FPGA_GTP.SchDoc|SubPartUniqueId13=IJQHRHAL|SubPartDocPath13=FPGA_GTP.SchDoc|SubPartUniqueId14=RIFFUJKX|SubPartDocPath14=JTAG chain + SFPGA flash.SchDoc|SubPartUniqueId15=TNOTCNVT|SubPartDocPath15=AFPGA_power.SchDoc|SubPartUniqueId16=VINGWMCL|SubPartDocPath16=AFPGA_power.SchDoc|SubPartUniqueId17=KPAAVKWI|SubPartDocPath17=AFPGA_power.SchDoc|SubPartUniqueId18=TWWKQKGX|SubPartDocPath18=AFPGA_power.SchDoc
Record=FPGA_COMPONENT|BaseComponentDesignator=IC40|DocumentName=SFPGA.SchDoc|LibraryReference=XC6SLX9-2FTG256C|SubProjectPath= |Configuration= |Description=Spartan-6 LX 1.2V FPGA, 186 User I/Os, 256-Ball Fine-Pitch Thin BGA (1.0mm Pitch), Speed Grade 2, Commercial Grade, Pb-Free|NexusDeviceId=XC6SLX9-2FTG256C|SubPartUniqueId1=QTOJQSMD|SubPartDocPath1=SFPGA.SchDoc|SubPartUniqueId2=AOYRMHFT|SubPartDocPath2=SFPGA.SchDoc|SubPartUniqueId3=OLSNOCAD|SubPartDocPath3=SFPGA.SchDoc|SubPartUniqueId4=LFMNKHSD|SubPartDocPath4=SFPGA.SchDoc|SubPartUniqueId5=ODYKENES|SubPartDocPath5=JTAG chain + SFPGA flash.SchDoc|SubPartUniqueId6=WVUDHYEK|SubPartDocPath6=SFPGA_power.SchDoc|SubPartUniqueId7=FATYVDMF|SubPartDocPath7=SFPGA_power.SchDoc
......@@ -113,3 +113,12 @@ R1 = 6800.0? R2 = 430.0? Ir = 1.628mA Vout = 11.770V R1/R2 = 15.814
R1 = 7500.0? R2 = 470.0? Ir = 1.489mA Vout = 11.870V R1/R2 = 15.957 Rerror = 1.15%
R1 = 8200.0? R2 = 510.0? Ir = 1.373mA Vout = 11.955V R1/R2 = 16.078 Rerror = 0.40%
R1 = 9100.0? R2 = 560.0? Ir = 1.250mA Vout = 12.075V R1/R2 = 16.250 Rerror = 0.66%
PLL settings
OUT0, 1 div 0, LVPECL
OUT 2,3 div 1, LVPECL
OUT 4,5, div 2, LVPECL
OUT 6,7, div 3, LVDS/LVPECL
OUT 8,9, div 4, LVDS/LVPECL
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment