ZYNQ UART0 TX/RX pin swap
UART0 PS_TXD MIO51 is an output which connects to U54 CP2105 pin 21 (TXD_SCI) which is also an output. Same applies for UART0 PS_RXD MIO50 and U54 CP2105 pin 20 (RXD_SCI) which are both inputs.
Unfortunately ZYNQ UART0 tx/rx signals can't be swapped in the FPGA configuration. Therefore these signals need a swap on PCB layout level.