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SPEC7
Commit 5fe1b70c authored by Peter Jansweijer's avatar Peter Jansweijer
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update wrpc-v5.0

parent 79cbcdf2
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    hdl/sim/spec7_ref_design/VCom_spec7_wr_ref_top_Functional.tcl
    View file @ 5fe1b70c
    ......@@ -6,8 +6,8 @@
    #vcom -explicit -93 -work work ../../top/spec7_ref_design/spec7_wr_ref_top.xdc
    #vcom -explicit -93 -work work ../../top/spec7_ref_design/spec7_wr_hpsec_top.xdc
    vcom -explicit -93 -work work ../../top/spec7_ref_design/wr_irigb_conv.vhd
    vcom -explicit -93 -work work ../../top/spec7_ref_design/pll_62m5_500m.vhd
    vcom -explicit -93 -work work ../../top/spec7_ref_design/wr_irigb_conv.vhd
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/common/gc_dec_8b10b.vhd
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/common/gc_edge_detect.vhd
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/common/gc_enc_8b10b.vhd
    ......@@ -63,6 +63,7 @@ vlog -work work ../../wr-cores/ip_cores/urv-core/rtl/urv_regfile.v
    vlog -work work ../../wr-cores/ip_cores/urv-core/rtl/urv_writeback.v
    vcom -explicit -93 -work work ../../wr-cores/modules/fabric/wr_fabric_pkg.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/fabric/xwrf_loopback/lbk_wishbone_controller.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/timing/dmtd_sampler.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_mdio_regs.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_wishbone_controller.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_mini_nic/minic_wbgen2_pkg.vhd
    ......@@ -85,7 +86,7 @@ vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/wish
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_onewire_master/wb_onewire_master.vhd
    vlog -work work ../../wr-cores/ip_cores/urv-core/rtl/urv_cpu.v
    vcom -explicit -93 -work work ../../wr-cores/modules/fabric/xwrf_mux.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/timing/dmtd_sampler.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/timing/dmtd_with_deglitcher.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/timing/pulse_stamper_sync.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/endpoint_pkg.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_mini_nic/minic_wb_slave.vhd
    ......@@ -95,6 +96,7 @@ vcom -explicit -93 -work work ../../wr-cores/modules/wr_streamers/dropping_buffe
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_streamers/fixed_latency_ts_match.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_streamers/ts_restore_tai.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wrc_core/wrc_cpu_csr_wb.vhd
    vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/wr_gtx_phy_family7_lp.vhd
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/genrams/common/generic_shiftreg_fifo.vhd
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/genrams/generic/generic_async_fifo.vhd
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/genrams/generic/generic_async_fifo_dual_rst.vhd
    ......@@ -105,17 +107,15 @@ vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/wish
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_crossbar/xwb_sdb_crossbar.vhd
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_gpio_port/xwb_gpio_port.vhd
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_onewire_master/xwb_onewire_master.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/timing/dmtd_with_deglitcher.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/timing/dmtd_phase_meas.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/timing/pulse_stamper.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/endpoint_private_pkg.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_pps_gen/xwr_pps_gen.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wrc_core/wrcore_pkg.vhd
    vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/wr_gtx_phy_family7_lp.vhd
    vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_xilinx_pkg.vhd
    vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/genrams/xilinx/generic_dpram.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/fabric/xwb_fabric_sink.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/fabric/xwb_fabric_source.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/timing/dmtd_phase_meas.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_autonegotiation.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_clock_alignment_fifo.vhd
    vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_leds_controller.vhd
    ......
    hdl/syn/spec7_ref_design/proj_file_list.txt
    View file @ 5fe1b70c
    ......@@ -63,6 +63,7 @@
    ../../wr-cores/ip_cores/urv-core/rtl/urv_writeback.v
    ../../wr-cores/modules/fabric/wr_fabric_pkg.vhd
    ../../wr-cores/modules/fabric/xwrf_loopback/lbk_wishbone_controller.vhd
    ../../wr-cores/modules/timing/dmtd_sampler.vhd
    ../../wr-cores/modules/wr_endpoint/ep_mdio_regs.vhd
    ../../wr-cores/modules/wr_endpoint/ep_wishbone_controller.vhd
    ../../wr-cores/modules/wr_mini_nic/minic_wbgen2_pkg.vhd
    ......@@ -85,7 +86,7 @@
    ../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_onewire_master/wb_onewire_master.vhd
    ../../wr-cores/ip_cores/urv-core/rtl/urv_cpu.v
    ../../wr-cores/modules/fabric/xwrf_mux.vhd
    ../../wr-cores/modules/timing/dmtd_sampler.vhd
    ../../wr-cores/modules/timing/dmtd_with_deglitcher.vhd
    ../../wr-cores/modules/timing/pulse_stamper_sync.vhd
    ../../wr-cores/modules/wr_endpoint/endpoint_pkg.vhd
    ../../wr-cores/modules/wr_mini_nic/minic_wb_slave.vhd
    ......@@ -95,6 +96,7 @@
    ../../wr-cores/modules/wr_streamers/fixed_latency_ts_match.vhd
    ../../wr-cores/modules/wr_streamers/ts_restore_tai.vhd
    ../../wr-cores/modules/wrc_core/wrc_cpu_csr_wb.vhd
    ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/wr_gtx_phy_family7_lp.vhd
    ../../wr-cores/ip_cores/general-cores/modules/genrams/common/generic_shiftreg_fifo.vhd
    ../../wr-cores/ip_cores/general-cores/modules/genrams/generic/generic_async_fifo.vhd
    ../../wr-cores/ip_cores/general-cores/modules/genrams/generic/generic_async_fifo_dual_rst.vhd
    ......@@ -105,17 +107,15 @@
    ../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_crossbar/xwb_sdb_crossbar.vhd
    ../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_gpio_port/xwb_gpio_port.vhd
    ../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_onewire_master/xwb_onewire_master.vhd
    ../../wr-cores/modules/timing/dmtd_with_deglitcher.vhd
    ../../wr-cores/modules/timing/dmtd_phase_meas.vhd
    ../../wr-cores/modules/timing/pulse_stamper.vhd
    ../../wr-cores/modules/wr_endpoint/endpoint_private_pkg.vhd
    ../../wr-cores/modules/wr_pps_gen/xwr_pps_gen.vhd
    ../../wr-cores/modules/wrc_core/wrcore_pkg.vhd
    ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/wr_gtx_phy_family7_lp.vhd
    ../../wr-cores/platform/xilinx/wr_xilinx_pkg.vhd
    ../../wr-cores/ip_cores/general-cores/modules/genrams/xilinx/generic_dpram.vhd
    ../../wr-cores/modules/fabric/xwb_fabric_sink.vhd
    ../../wr-cores/modules/fabric/xwb_fabric_source.vhd
    ../../wr-cores/modules/timing/dmtd_phase_meas.vhd
    ../../wr-cores/modules/wr_endpoint/ep_autonegotiation.vhd
    ../../wr-cores/modules/wr_endpoint/ep_clock_alignment_fifo.vhd
    ../../wr-cores/modules/wr_endpoint/ep_leds_controller.vhd
    ......
    wr-cores @ 0f8fbced
    Subproject commit 0e3962b4d4f8def75e2804d5b85eb183fdbea6ef
    Subproject commit 0f8fbced87988254f5c9ca55c0e04585b29b485c
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