Change Tandem Boot BD name to shorten the resulting paths and avoid Windows crashes

parent 846774b8
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
"design_info": { "design_info": {
"boundary_crc": "0xE176D980E11BED4F", "boundary_crc": "0xE176D980E11BED4F",
"device": "xc7z035fbg676-1", "device": "xc7z035fbg676-1",
"name": "processing_system_pcie_tandem_boot", "name": "ps_pci_tandem",
"synth_flow_mode": "Hierarchical", "synth_flow_mode": "Hierarchical",
"tool_version": "2019.2", "tool_version": "2019.2",
"validated": "true" "validated": "true"
...@@ -88,7 +88,7 @@ ...@@ -88,7 +88,7 @@
"right": "0", "right": "0",
"parameters": { "parameters": {
"CLK_DOMAIN": { "CLK_DOMAIN": {
"value": "processing_system_pcie_tandem_boot_pci_clk_n", "value": "ps_pci_tandem_pci_clk_n",
"value_src": "default" "value_src": "default"
}, },
"FREQ_HZ": { "FREQ_HZ": {
...@@ -112,7 +112,7 @@ ...@@ -112,7 +112,7 @@
"right": "0", "right": "0",
"parameters": { "parameters": {
"CLK_DOMAIN": { "CLK_DOMAIN": {
"value": "processing_system_pcie_tandem_boot_pci_clk_p", "value": "ps_pci_tandem_pci_clk_p",
"value_src": "default" "value_src": "default"
}, },
"FREQ_HZ": { "FREQ_HZ": {
...@@ -167,7 +167,7 @@ ...@@ -167,7 +167,7 @@
"components": { "components": {
"pcie_7x": { "pcie_7x": {
"vlnv": "xilinx.com:ip:pcie_7x:3.3", "vlnv": "xilinx.com:ip:pcie_7x:3.3",
"xci_name": "processing_system_pcie_tandem_boot_pcie_7x_0", "xci_name": "ps_pci_tandem_pcie_7x_0",
"parameters": { "parameters": {
"Bar0_64bit": { "Bar0_64bit": {
"value": "true" "value": "true"
...@@ -296,7 +296,7 @@ ...@@ -296,7 +296,7 @@
}, },
"ps7": { "ps7": {
"vlnv": "xilinx.com:ip:processing_system7:5.5", "vlnv": "xilinx.com:ip:processing_system7:5.5",
"xci_name": "processing_system_pcie_tandem_boot_ps7_0", "xci_name": "ps_pci_tandem_ps7_0",
"parameters": { "parameters": {
"PCW_ACT_APU_PERIPHERAL_FREQMHZ": { "PCW_ACT_APU_PERIPHERAL_FREQMHZ": {
"value": "666.666687" "value": "666.666687"
...@@ -1139,7 +1139,7 @@ ...@@ -1139,7 +1139,7 @@
}, },
"util_ds_buf_0": { "util_ds_buf_0": {
"vlnv": "xilinx.com:ip:util_ds_buf:2.1", "vlnv": "xilinx.com:ip:util_ds_buf:2.1",
"xci_name": "processing_system_pcie_tandem_boot_util_ds_buf_0_0", "xci_name": "ps_pci_tandem_util_ds_buf_0_0",
"parameters": { "parameters": {
"C_BUF_TYPE": { "C_BUF_TYPE": {
"value": "IBUFDSGTE" "value": "IBUFDSGTE"
...@@ -1148,7 +1148,7 @@ ...@@ -1148,7 +1148,7 @@
}, },
"xlconstant_0": { "xlconstant_0": {
"vlnv": "xilinx.com:ip:xlconstant:1.1", "vlnv": "xilinx.com:ip:xlconstant:1.1",
"xci_name": "processing_system_pcie_tandem_boot_xlconstant_0_0", "xci_name": "ps_pci_tandem_xlconstant_0_0",
"parameters": { "parameters": {
"CONST_VAL": { "CONST_VAL": {
"value": "0" "value": "0"
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
../../top/spec7_tandem_boot/spec7_tandem_boot_top.xdc ../../top/spec7_tandem_boot/spec7_tandem_boot_top.xdc
# bmm not supported by hdlmake? Need to add it manually... # bmm not supported by hdlmake? Need to add it manually...
../../ip/processing_system_pcie_tandem_boot.bd ../../ip/ps_pci_tandem.bd
# include hardware version ID un FPGA USER_ID register: # include hardware version ID un FPGA USER_ID register:
hdl_version.xdc hdl_version.xdc
...@@ -82,7 +82,7 @@ entity spec7_tandem_boot_top is ...@@ -82,7 +82,7 @@ entity spec7_tandem_boot_top is
end spec7_tandem_boot_top; end spec7_tandem_boot_top;
architecture STRUCTURE of spec7_tandem_boot_top is architecture STRUCTURE of spec7_tandem_boot_top is
component processing_system_pcie_tandem_boot_wrapper is component ps_pci_tandem_wrapper is
port ( port (
pci_clk_n : in STD_LOGIC_VECTOR ( 0 to 0 ); pci_clk_n : in STD_LOGIC_VECTOR ( 0 to 0 );
pci_clk_p : in STD_LOGIC_VECTOR ( 0 to 0 ); pci_clk_p : in STD_LOGIC_VECTOR ( 0 to 0 );
...@@ -113,9 +113,9 @@ architecture STRUCTURE of spec7_tandem_boot_top is ...@@ -113,9 +113,9 @@ architecture STRUCTURE of spec7_tandem_boot_top is
FIXED_IO_ps_clk : inout STD_LOGIC; FIXED_IO_ps_clk : inout STD_LOGIC;
FIXED_IO_ps_porb : inout STD_LOGIC FIXED_IO_ps_porb : inout STD_LOGIC
); );
end component processing_system_pcie_tandem_boot_wrapper; end component ps_pci_tandem_wrapper;
begin begin
processing_system_pcie_tandem_boot_wrapper_i: component processing_system_pcie_tandem_boot_wrapper ps_pci_tandem_wrapper_i: component ps_pci_tandem_wrapper
port map ( port map (
DDR_addr(14 downto 0) => DDR_addr(14 downto 0), DDR_addr(14 downto 0) => DDR_addr(14 downto 0),
DDR_ba(2 downto 0) => DDR_ba(2 downto 0), DDR_ba(2 downto 0) => DDR_ba(2 downto 0),
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment